Datasheet

Serial Communications Interface (SCI)
MC9S12DP256 — Revision 1.1
Serial Communications Interface (SCI)
NOTE: In 8-bit data format, only SCI data register low (SCIDRL) needs to be
accessed.
NOTE: When transmitting in 9-bit data format and using 8-bit write instructions,
write first to SCI data register high (SCIDRH), then SCIDRL.
Functional Description
This section provides a complete functional description of the SCI block,
detailing the operation of the design from the end user perspective in a
number of subsections.
Figure 63 shows the structure of the SCI module. The SCI allows full
duplex, asynchronous, NRZ serial communication between the CPU
and remote devices, including other CPUs. The SCI transmitter and
receiver operate independently, although they use the same baud rate
generator. The CPU monitors the status of the SCI, writes the data to be
transmitted, and processes received data.
Data Format The SCI uses the standard NRZ mark/space data format illustrated in
Figure 65 below.
Figure 65 SCI Data Formats
Each data character is contained in a frame that includes a start bit, eight
or nine data bits, and a stop bit. Clearing the M bit in SCI control register
1 configures the SCI for 8-bit data characters. A frame with eight data
BIT 5
START
BIT
BIT 0 BIT 1
NEXT
STOP
BIT
START
BIT
9-BIT DATA FORMAT
BIT 2 BIT 3 BIT 4 BIT 6 BIT 7
PARITY
OR DATA
BIT
PARITY
OR DATA
BIT
BIT M IN SCICR1 SET
8-BIT DATA FORMAT
BIT M IN SCICR1 CLEAR
BIT 5BIT 0 BIT 1 BIT 2 BIT 3 BIT 4 BIT 6 BIT 7
BIT 8
STOP
BIT
NEXT
START
BIT
START
BIT
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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