Datasheet
Table Of Contents
- List of Sections
- Table of Contents
- General Description
- Central Processing Unit (CPU)
- Pinout and Signal Description
- System Configuration
- Registers
- Operating Modes
- Resource Mapping
- Bus Control and Input/Output
- Resets and Interrupts
- Voltage Regulator (VREG)
- Flash EEPROM 256K
- EEPROM 4K
- Port Integration Module
- Clocks and Reset Generator (CRG)
- Pulse Width Modulator (PWM)
- Enhanced Capture Timer (ECT)
- Serial Communications Interface (SCI)
- Serial Peripheral Interface (SPI)
- Inter-IC Bus (IIC)
- MSCAN
- Analog to Digital Converter
- Byte Data Link Controller Module
- Contents
- Overview
- Features
- Block Diagram
- Register Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization/Basic Operation
- Transmitting A Message
- Receiving A Message
- Transmitting An In-Frame Response (IFR)
- Receiving An In-Frame Response (IFR)
- Special BDLC Operations
- Modes of Operation
- Interrupt Operation
- Low Power Options
- Background Debug Module (BDM)
- Breakpoint (BKP) Module
- Revision History
- Glossary
- Literature Updates

Enhanced Capture Timer (ECT)
MC9S12DP256 — Revision 1.1
Enhanced Capture Timer (ECT)
Interrupts
This section describes interrupts originated by the ECT block.The MCU
must service the interrupt requests. Table 63 lists the interrupts
generated by the ECT to communicate with the MCU.
Table 63 ECT Interrupts
Interrupt
Offset
(1)
Vector
1
Priority
1
Source Description
ectch_int[7:0] – – – Timer Channel 7–0 Active high timer channel interrupts 7–0
ectmcufi_int – – –
Modulus counter
underflow
Active high modulus counter interrupt
ectpabo_int – – –
Pulse Accumulator B
Overflow
Active high pulse accumulator B interrupt
ectpaai_int – – –
Pulse Accumulator A
Input
Active high pulse accumulator A input
interrupt
ectpaao_int – – –
Pulse Accumulator A
Overflow
Pulse accumulator overflow interrupt
ectovi_int – – – Timer Overflow Timer Overflow interrupt
1. Chip Dependent
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