Datasheet

ManualsBrandsNXP SEMICONDUCTORS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller QFP 80 (14x14) 16-Bit 25 MHz I/O number 59

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Table Of Contents

List of Sections
Table of Contents
General Description
- Contents
- Introduction
- Features
- MC9S12DP256 112-Pin Block Diagram
- Ordering Information
Central Processing Unit (CPU)
- Contents
- Introduction
- Programming Model
- Data Types
- Addressing Modes
- Indexed Addressing Modes
- Opcodes and Operands
- Instruction Set Summary
Pinout and Signal Description
- Contents
- MC9S12DP256 Pin Assignments in 112-pin QFP
- Power Supply Pins
- Signal Descriptions
- Port Signals
System Configuration
- Contents
- Introduction
- Modules Variabilities
- MCU Variabilities
Registers
- Contents
- Register Block
Operating Modes
- Contents
- Introduction
- Operating Modes
- Background Debug Mode
- Security
Resource Mapping
- Contents
- Introduction
- Internal Resource Mapping
- Flash EEPROM mapping through internal Memory Expansion
- Miscellaneous System Control Register
- Memory Maps
Bus Control and Input/Output
- Contents
- Introduction
- Detecting Access Type from External Signals
- Stretched Bus Cycles
- PIPE Status Signals
- Registers
Resets and Interrupts
- Contents
- Introduction
- Register Map
- Exception Priority
- Maskable interrupts
- Latching of Interrupts
- Register Descriptions
- Resets
- Effects of Reset
- Register Stacking
Voltage Regulator (VREG)
- Contents
- Overview
- Features
- Block Diagram
- Functional Description
- External Pin Connection
- Reset Initialization
- Modes of Operation
Flash EEPROM 256K
- Contents
- Glossary
- Overview
- Features
- Block Diagram
- Module Memory Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization
- Modes of Operation
- Low Power Options
- Interrupt Operation
EEPROM 4K
- Contents
- Glossary
- Overview
- Features
- Block Diagram
- Module Memory Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization
- Modes of Operation
- Interrupt Operation
Port Integration Module
- Contents
- Overview
- Block Diagram
- External Pin Descriptions
- 80 Pin QFP bond-out version
- Register Map
- Register Descriptions
- Reset Initialization
- Functional Description
- Low Power Options
- Interrupt Operation
Clocks and Reset Generator (CRG)
- Contents
- Overview
- Features
- Block Diagram
- Register Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization
- Interrupt Operation
- Low Power Options
Pulse Width Modulator (PWM)
- Contents
- Overview
- Features
- Block Diagram
- External Pin Descriptions
- Register Map
- Register Descriptions
- Functional Description
- Reset Initialization
- Modes of Operation
- Low Power Options
- Interrupt Operation
Enhanced Capture Timer (ECT)
- Contents
- Overview
- Features
- Modes of Operation
- Abbreviations
- Block Diagram
- Signal Descriptions
- Module Memory Map
- Register Quick Reference
- Register Descriptions
- Modes of Operation
- Interrupts
- Description of Interrupt Operation
Serial Communications Interface (SCI)
- Contents
- Overview
- Features
- Modes of Operation
- SCI Interface Diagram
- Block Diagram
- Signal Descriptions
- Module Memory Map
- Register Quick Reference
- Register Descriptions
- Functional Description
- Modes of Operation
- Interrupt Operation
Serial Peripheral Interface (SPI)
- Contents
- Overview
- Features
- Modes of Operation
- Block Diagram
- Signal Descriptions
- Module Memory Map
- Register Quick Reference
- Register Descriptions
- Functional Description
- Low Power Mode Options
- Errata
- Reset
- Interrupts
Inter-IC Bus (IIC)
- Contents
- Overview
- Features
- Modes of Operation
- Block Diagram
- Signal Descriptions
- Module Memory Map
- Register Quick Reference
- Register Descriptions
- I-Bus Protocol
- Interrupt Operation
- Modes of Operation
- Programming
MSCAN
- Contents
- Overview
- Features
- Block Diagram
- External Pin Descriptions
- Register Map
- Functional Description
- Register Descriptions
- Modes of Operation
- Low Power Options
- Interrupt Operation
Analog to Digital Converter
- Contents
- Overview
- Features
- Block Diagram
- Register Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization
- Modes of Operation
- Sample Conversion
- General Purpose Input Ports
Byte Data Link Controller Module
- Contents
- Overview
- Features
- Block Diagram
- Register Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization/Basic Operation
- Transmitting A Message
- Receiving A Message
- Transmitting An In-Frame Response (IFR)
- Receiving An In-Frame Response (IFR)
- Special BDLC Operations
- Modes of Operation
- Interrupt Operation
- Low Power Options
Background Debug Module (BDM)
- Contents
- Overview
- Interface Signals
- Registers
- Operation
- Modes of Operation
- Low-Power Options
- Interrupt Operation
Breakpoint (BKP) Module
- Contents
- Overview
- Features
- Block Diagram
- External Pin Descriptions
- Register Descriptions
- Functional Description
- Breakpoint Operating Modes
- Breakpoint Types
- Modes of Operation
- Low Power Options
- Reset Initialization
- Interrupt Operation
- General Purpose I/O Ports
Revision History
- Changes from Rev 1.0 to Rev 1.1
Glossary
Literature Updates
- Literature Distribution Centers
- Customer Focus Center
- Microcontroller Division’s Web Site

Enhanced Capture Timer (ECT)

MC9S12DP256 — Revision 1.1

Enhanced Capture Timer (ECT)

Bit 7 654321Bit 0

$0000 IOS7 IOS6 IOS5 IOS4 IOS3 IOS2 IOS1 IOS0 TIOS

$0001 FOC7 FOC6 FOC5 FOC4 FOC3 FOC2 FOC1 FOC0 CFORC

$0002 OC7M7 OC7M6 OC7M5 OC7M4 OC7M3 OC7M2 OC7M1 OC7M0 OC7M

$0003 OC7D7 OC7D6 OC7D5 OC7D4 OC7D3 OC7D2 OC7D1 OC7D0 OC7D

$0004 Bit 15 14 13 12 11 10 9 Bit 8 TCNT(hi)

$0005 Bit 7 654321Bit 0 TCNT(lo)

$0006 TEN TSWAI TSFRZ TFFCA 3 2 1 Bit 0 TSCR1

$0007 TOV7 TOV6 TOV5 TOV4 TOV3 TOV2 TOV1 TOV0 TTOV

$0008 OM7 OL7 OM6 OL6 OM5 OL5 OM4 OL4 TCTL1

$0009 OM3 OL3 OM2 OL2 OM1 OL1 OM0 OL0 TCTL2

$000A EDG7B EDG7A EDG6B EDG6A EDG5B EDG5A EDG4B EDG4A TCTL3

$000B EDG3B EDG3A EDG2B EDG2A EDG1B EDG1A EDG0B EDG0A TCTL4

$000C C7I C6I C5I C4I C3I C2I C1I C0I TIE

$000D TOI 0 0 0 TCRE PR2 PR1 PR0 TSCR2

$000E C7F C6F C5F C4F C3F C2F C1F C0F TFLG1

$000F TOF 0000000TFLG2

$0010 Bit 15 14 13 12 11 10 9 Bit 8 TC0(hi)

$0011 Bit 7 654321Bit 0 TC0(lo)

$0012 Bit 15 14 13 12 11 10 9 Bit 8 TC1(hi)

$0013 Bit 7 654321Bit 0 TC1(lo)

$0014 Bit 15 14 13 12 11 10 9 Bit 8 TC2(hi)

$0015 Bit 7 654321Bit 0 TC2(lo)

$0016 Bit 15 14 13 12 11 10 9 Bit 8 TC3(hi)

$0017 Bit 7 654321Bit 0 TC3(lo)

$0018 Bit 15 14 13 12 11 10 9 Bit 8 TC4(hi)

$0019 Bit 7 654321Bit 0 TC4(lo)

$001A Bit 15 14 13 12 11 10 9 Bit 8 TC5(hi)

$001B Bit 7 654321Bit 0 TC5(lo)

$001C Bit 15 14 13 12 11 10 9 Bit 8 TC6(hi)

$001D Bit 7 654321Bit 0 TC6(lo)

$001E Bit 15 14 13 12 11 10 9 Bit 8 TC7(hi)

$001F Bit 7 654321Bit 0 TC7(lo)

Freescale Semiconductor, I

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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