Datasheet

ManualsBrandsNXP SEMICONDUCTORS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller QFP 80 (14x14) 16-Bit 25 MHz I/O number 59

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Table Of Contents

List of Sections
Table of Contents
General Description
- Contents
- Introduction
- Features
- MC9S12DP256 112-Pin Block Diagram
- Ordering Information
Central Processing Unit (CPU)
- Contents
- Introduction
- Programming Model
- Data Types
- Addressing Modes
- Indexed Addressing Modes
- Opcodes and Operands
- Instruction Set Summary
Pinout and Signal Description
- Contents
- MC9S12DP256 Pin Assignments in 112-pin QFP
- Power Supply Pins
- Signal Descriptions
- Port Signals
System Configuration
- Contents
- Introduction
- Modules Variabilities
- MCU Variabilities
Registers
- Contents
- Register Block
Operating Modes
- Contents
- Introduction
- Operating Modes
- Background Debug Mode
- Security
Resource Mapping
- Contents
- Introduction
- Internal Resource Mapping
- Flash EEPROM mapping through internal Memory Expansion
- Miscellaneous System Control Register
- Memory Maps
Bus Control and Input/Output
- Contents
- Introduction
- Detecting Access Type from External Signals
- Stretched Bus Cycles
- PIPE Status Signals
- Registers
Resets and Interrupts
- Contents
- Introduction
- Register Map
- Exception Priority
- Maskable interrupts
- Latching of Interrupts
- Register Descriptions
- Resets
- Effects of Reset
- Register Stacking
Voltage Regulator (VREG)
- Contents
- Overview
- Features
- Block Diagram
- Functional Description
- External Pin Connection
- Reset Initialization
- Modes of Operation
Flash EEPROM 256K
- Contents
- Glossary
- Overview
- Features
- Block Diagram
- Module Memory Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization
- Modes of Operation
- Low Power Options
- Interrupt Operation
EEPROM 4K
- Contents
- Glossary
- Overview
- Features
- Block Diagram
- Module Memory Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization
- Modes of Operation
- Interrupt Operation
Port Integration Module
- Contents
- Overview
- Block Diagram
- External Pin Descriptions
- 80 Pin QFP bond-out version
- Register Map
- Register Descriptions
- Reset Initialization
- Functional Description
- Low Power Options
- Interrupt Operation
Clocks and Reset Generator (CRG)
- Contents
- Overview
- Features
- Block Diagram
- Register Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization
- Interrupt Operation
- Low Power Options
Pulse Width Modulator (PWM)
- Contents
- Overview
- Features
- Block Diagram
- External Pin Descriptions
- Register Map
- Register Descriptions
- Functional Description
- Reset Initialization
- Modes of Operation
- Low Power Options
- Interrupt Operation
Enhanced Capture Timer (ECT)
- Contents
- Overview
- Features
- Modes of Operation
- Abbreviations
- Block Diagram
- Signal Descriptions
- Module Memory Map
- Register Quick Reference
- Register Descriptions
- Modes of Operation
- Interrupts
- Description of Interrupt Operation
Serial Communications Interface (SCI)
- Contents
- Overview
- Features
- Modes of Operation
- SCI Interface Diagram
- Block Diagram
- Signal Descriptions
- Module Memory Map
- Register Quick Reference
- Register Descriptions
- Functional Description
- Modes of Operation
- Interrupt Operation
Serial Peripheral Interface (SPI)
- Contents
- Overview
- Features
- Modes of Operation
- Block Diagram
- Signal Descriptions
- Module Memory Map
- Register Quick Reference
- Register Descriptions
- Functional Description
- Low Power Mode Options
- Errata
- Reset
- Interrupts
Inter-IC Bus (IIC)
- Contents
- Overview
- Features
- Modes of Operation
- Block Diagram
- Signal Descriptions
- Module Memory Map
- Register Quick Reference
- Register Descriptions
- I-Bus Protocol
- Interrupt Operation
- Modes of Operation
- Programming
MSCAN
- Contents
- Overview
- Features
- Block Diagram
- External Pin Descriptions
- Register Map
- Functional Description
- Register Descriptions
- Modes of Operation
- Low Power Options
- Interrupt Operation
Analog to Digital Converter
- Contents
- Overview
- Features
- Block Diagram
- Register Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization
- Modes of Operation
- Sample Conversion
- General Purpose Input Ports
Byte Data Link Controller Module
- Contents
- Overview
- Features
- Block Diagram
- Register Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization/Basic Operation
- Transmitting A Message
- Receiving A Message
- Transmitting An In-Frame Response (IFR)
- Receiving An In-Frame Response (IFR)
- Special BDLC Operations
- Modes of Operation
- Interrupt Operation
- Low Power Options
Background Debug Module (BDM)
- Contents
- Overview
- Interface Signals
- Registers
- Operation
- Modes of Operation
- Low-Power Options
- Interrupt Operation
Breakpoint (BKP) Module
- Contents
- Overview
- Features
- Block Diagram
- External Pin Descriptions
- Register Descriptions
- Functional Description
- Breakpoint Operating Modes
- Breakpoint Types
- Modes of Operation
- Low Power Options
- Reset Initialization
- Interrupt Operation
- General Purpose I/O Ports
Revision History
- Changes from Rev 1.0 to Rev 1.1
Glossary
Literature Updates
- Literature Distribution Centers
- Customer Focus Center
- Microcontroller Division’s Web Site

Enhanced Capture Timer (ECT)

Module Memory Map

MC9S12DP256 — Revision 1.1

Enhanced Capture Timer (ECT)

NOTE:

1.Always read $00.

2. Only writable in special modes (test_mode = 1).

3. Write to these registers have no meaning or effect during input capture.

4. May be written once (test_mode = 0) but writes are always permitted when test_mode = 0

5. Write has no effect.

$_22 Pulse Accumulator Count Register3 (PACN3) Read/Write

$0023 Pulse Accumulator Count Register2 (PACN2) Read/Write

$0024 Pulse Accumulator Count Register1 (PACN1) Read/Write

$0025 Pulse Accumulator Count Register0 (PACN0) Read/Write

$0026 16-Bit Modulus Down Counter Register (MCCTL) Read/Write

$0027 16-Bit Modulus Down Counter Flag Register (MCFLG) Read/Write

$0028 Input Control Pulse Accumulator Register (ICPAR) Read/Write

$0029 Delay Counter Control Register (DLYCT) Read/Write

$002A Input Control Overwrite Register (ICOVW) Read/Write

$002B Input Control System Control Register (ICSYS)

Read/Write

$002C Reserved

–

$002D Timer Test Register (TIMTST)

Read/Write

$002E Reserved –

$002F Reserved –

$0030 16-Bit Pulse Accumulator B Control Register (PBCTL) Read/Write

$0031 16-Bit Pulse Accumulator B Flag Register (PBFLG) Read/Write

$0032 8-Bit Pulse Accumulator Holding Register3 (PA3H)

Read/Write

$0033 8-Bit Pulse Accumulator Holding Register2 (PA2H)

Read/Write

$0034 8-Bit Pulse Accumulator Holding Register1 (PA1H)

Read/Write

$0035 8-Bit Pulse Accumulator Holding Register0 (PA0H)

Read/Write

$0036 Modulus Down-Counter Count Register High (MCCNT) Read/Write

$0037 Modulus Down-Counter Count Register Low (MCCNT) Read/Write

$0038 Timer Input Capture Holding Register0 High (TC0H)

Read/Write

$0039 Timer Input Capture Holding Register0 Low (TC0H)

Read/Write

$003A Timer Input Capture Holding Register1 High(TC1H)

Read/Write

$003B Timer Input Capture Holding Register1 Low (TC1H)

Read/Write

$003C Timer Input Capture Holding Register2 High (TC2H)

Read/Write

$003D Timer Input Capture Holding Register2 Low (TC2H)

Read/Write

$003E Timer Input Capture Holding Register3 High (TC3H)

Read/Write

$003F Timer Input Capture Holding Register3 Low (TC3H)

Read/Write

Table 55 Module Memory Map

Freescale Semiconductor, I

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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