Datasheet

ManualsBrandsNXP SEMICONDUCTORS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller QFP 80 (14x14) 16-Bit 25 MHz I/O number 59

351

352

353

354

355

356

357

358

359

360

Table Of Contents

List of Sections
Table of Contents
General Description
- Contents
- Introduction
- Features
- MC9S12DP256 112-Pin Block Diagram
- Ordering Information
Central Processing Unit (CPU)
- Contents
- Introduction
- Programming Model
- Data Types
- Addressing Modes
- Indexed Addressing Modes
- Opcodes and Operands
- Instruction Set Summary
Pinout and Signal Description
- Contents
- MC9S12DP256 Pin Assignments in 112-pin QFP
- Power Supply Pins
- Signal Descriptions
- Port Signals
System Configuration
- Contents
- Introduction
- Modules Variabilities
- MCU Variabilities
Registers
- Contents
- Register Block
Operating Modes
- Contents
- Introduction
- Operating Modes
- Background Debug Mode
- Security
Resource Mapping
- Contents
- Introduction
- Internal Resource Mapping
- Flash EEPROM mapping through internal Memory Expansion
- Miscellaneous System Control Register
- Memory Maps
Bus Control and Input/Output
- Contents
- Introduction
- Detecting Access Type from External Signals
- Stretched Bus Cycles
- PIPE Status Signals
- Registers
Resets and Interrupts
- Contents
- Introduction
- Register Map
- Exception Priority
- Maskable interrupts
- Latching of Interrupts
- Register Descriptions
- Resets
- Effects of Reset
- Register Stacking
Voltage Regulator (VREG)
- Contents
- Overview
- Features
- Block Diagram
- Functional Description
- External Pin Connection
- Reset Initialization
- Modes of Operation
Flash EEPROM 256K
- Contents
- Glossary
- Overview
- Features
- Block Diagram
- Module Memory Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization
- Modes of Operation
- Low Power Options
- Interrupt Operation
EEPROM 4K
- Contents
- Glossary
- Overview
- Features
- Block Diagram
- Module Memory Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization
- Modes of Operation
- Interrupt Operation
Port Integration Module
- Contents
- Overview
- Block Diagram
- External Pin Descriptions
- 80 Pin QFP bond-out version
- Register Map
- Register Descriptions
- Reset Initialization
- Functional Description
- Low Power Options
- Interrupt Operation
Clocks and Reset Generator (CRG)
- Contents
- Overview
- Features
- Block Diagram
- Register Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization
- Interrupt Operation
- Low Power Options
Pulse Width Modulator (PWM)
- Contents
- Overview
- Features
- Block Diagram
- External Pin Descriptions
- Register Map
- Register Descriptions
- Functional Description
- Reset Initialization
- Modes of Operation
- Low Power Options
- Interrupt Operation
Enhanced Capture Timer (ECT)
- Contents
- Overview
- Features
- Modes of Operation
- Abbreviations
- Block Diagram
- Signal Descriptions
- Module Memory Map
- Register Quick Reference
- Register Descriptions
- Modes of Operation
- Interrupts
- Description of Interrupt Operation
Serial Communications Interface (SCI)
- Contents
- Overview
- Features
- Modes of Operation
- SCI Interface Diagram
- Block Diagram
- Signal Descriptions
- Module Memory Map
- Register Quick Reference
- Register Descriptions
- Functional Description
- Modes of Operation
- Interrupt Operation
Serial Peripheral Interface (SPI)
- Contents
- Overview
- Features
- Modes of Operation
- Block Diagram
- Signal Descriptions
- Module Memory Map
- Register Quick Reference
- Register Descriptions
- Functional Description
- Low Power Mode Options
- Errata
- Reset
- Interrupts
Inter-IC Bus (IIC)
- Contents
- Overview
- Features
- Modes of Operation
- Block Diagram
- Signal Descriptions
- Module Memory Map
- Register Quick Reference
- Register Descriptions
- I-Bus Protocol
- Interrupt Operation
- Modes of Operation
- Programming
MSCAN
- Contents
- Overview
- Features
- Block Diagram
- External Pin Descriptions
- Register Map
- Functional Description
- Register Descriptions
- Modes of Operation
- Low Power Options
- Interrupt Operation
Analog to Digital Converter
- Contents
- Overview
- Features
- Block Diagram
- Register Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization
- Modes of Operation
- Sample Conversion
- General Purpose Input Ports
Byte Data Link Controller Module
- Contents
- Overview
- Features
- Block Diagram
- Register Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization/Basic Operation
- Transmitting A Message
- Receiving A Message
- Transmitting An In-Frame Response (IFR)
- Receiving An In-Frame Response (IFR)
- Special BDLC Operations
- Modes of Operation
- Interrupt Operation
- Low Power Options
Background Debug Module (BDM)
- Contents
- Overview
- Interface Signals
- Registers
- Operation
- Modes of Operation
- Low-Power Options
- Interrupt Operation
Breakpoint (BKP) Module
- Contents
- Overview
- Features
- Block Diagram
- External Pin Descriptions
- Register Descriptions
- Functional Description
- Breakpoint Operating Modes
- Breakpoint Types
- Modes of Operation
- Low Power Options
- Reset Initialization
- Interrupt Operation
- General Purpose I/O Ports
Revision History
- Changes from Rev 1.0 to Rev 1.1
Glossary
Literature Updates
- Literature Distribution Centers
- Customer Focus Center
- Microcontroller Division’s Web Site

Enhanced Capture Timer (ECT)

MC9S12DP256 — Revision 1.1

Enhanced Capture Timer (ECT)

Table 55 Module Memory Map

Offset Use Access

$_00 Timer Input Capture/Output Compare Select (TIOS) Read/Write

$_01 Timer Compare Force Register (CFORC)

Read/Write

$_02 Output Compare 7 Mask Register (OC7M) Read/Write

$_03 Output Compare 7 Data Register (OC7D) Read/Write

$_04 Timer Count Register High (TCNT)

Read/Write

$_05 Timer Count Register Low (TCNT)

Read/Write

$_06 Timer System Control Register1 (TSCR1) Read/Write

$_07 Timer Toggle Overﬂow Register (TTOV) Read/Write

$_08 Timer Control Register1 (TCTL1) Read/Write

$_09 Timer Control Register2 (TCTL2) Read/Write

$_0A Timer Control Register3 (TCTL3) Read/Write

$_0B Timer Control Register4 (TCTL4) Read/Write

$_0C Timer Interrupt Enable Register (TIE) Read/Write

$_0D Timer System Control Register2 (TSCR2) Read/Write

$_0E Main Timer Interrupt Flag1 (TFLG1) Read/Write

$_0F Main Timer Interrupt Flag2 (TFLG2) Read/Write

$_10 Timer Input Capture/Output Compare Register0 High (TC0)

Read/Write

$_11 Timer Input Capture/Output Compare Register0 Low (TC0)

Read/Write

$_12 Timer Input Capture/Output Compare Register1 High (TC1)

Read/Write

$_13 Timer Input Capture/Output Compare Register1 Low (TC1)

Read/Write

$_14 Timer Input Capture/Output Compare Register2 High (TC2)

Read/Write

$_15 Timer Input Capture/Output Compare Register2 Low (TC2)

Read/Write

$_16 Timer Input Capture/Output Compare Register3 High (TC3)

Read/Write

$_17 Timer Input Capture/Output Compare Register3 Low (TC3)

Read/Write

$_18 Timer Input Capture/Output Compare Register4 High (TC4)

Read/Write

$_19 Timer Input Capture/Output Compare Register4 Low (TC4)

Read/Write

$_1A Timer Input Capture/Output Compare Register5 High (TC5)

Read/Write

$_1B Timer Input Capture/Output Compare Register5 Low (TC5)

Read/Write

$_1C Timer Input Capture/Output Compare Register6 High (TC6)

Read/Write

$_1D Timer Input Capture/Output Compare Register6 Low (TC6)

Read/Write

$_1E Timer Input Capture/Output Compare Register7 High (TC7)

Read/Write

$_1F Timer Input Capture/Output Compare Register7 Low (TC7)

Read/Write

$_20 16-Bit Pulse Accumulator A Control Register (PACTL) Read/Write

$_21 Pulse Accumulator A Flag Register (PAFLG) Read/Write

Freescale Semiconductor, I

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

nc...