Datasheet

Pulse Width Modulator (PWM)
MC9S12DP256 — Revision 1.1
Pulse Width Modulator (PWM)
PWM Boundary
Cases
The following table summarizes the boundary conditions for the PWM
regardless of the output mode (Left Aligned or Center Aligned) and 8-bit
(normal) or 16-bit (concatenation):
Reset Initialization
The reset state of each individual bit is listed within the Register
Description section (see Register Descriptions) which details the
registers and their bit-fields. All special functions or modes which are
initialized during or just following reset are described within this section.
• The 8-bit up/down counter is configured as an up counter out of
reset.
• All the channels are disabled and all the counters don’t count.
Table 54 PWM Boundary Cases
PWMDTYx PWMPERx PPOLx PWMx Output
$00
(indicates no duty)
>$00 1
Always Low
$00
(indicates no duty)
>$00 0
Always High
XX
$00
(1)
(indicates no period)
1. Counter=$00 and does not count.
1
Always High
XX
$00
1
(indicates no period)
0
Always Low
>= PWMPERx XX 1
Always High
>= PWMPERx XX 0
Always Low
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...