Datasheet

Pulse Width Modulator (PWM)
Functional Description
MC9S12DP256 — Revision 1.1
Pulse Width Modulator (PWM)
Figure 51 PWM Center Aligned Output Example Waveform
PWM 16-Bit
Functions
The PWM timer also has the option of generating 8-channels of 8-bits or
4-channels of 16-bits for greater PWM resolution. This 16-bit channel
option is achieved through the concatenation of two 8-bit channels.
The PWMCTL register contains four control bits, each of which is used
to concatenate a pair of PWM channels into one 16-bit channel.
Channels 6 and 7 are concatenated with the CON67 bit, channels 4 and
5 are concatenated with the CON45 bit, channels 2 and 3 are
concatenated with the CON23 bit, and channels 0 and 1 are
concatenated with the CON01 bit.
CAUTION: Change these bits only when both corresponding channels are disabled.
When channels 6 and 7 are concatenated, channel 6 registers become
the high order bytes of the double byte channel as shown in Figure 52.
Similarly, when channels 4 and 5 are concatenated, channel 4 registers
become the high order bytes of the double byte channel. When channels
2 and 3 are concatenated, channel 2 registers become the high order
bytes of the double byte channel. When channels 0 and 1 are
concatenated, channel 0 registers become the high order bytes of the
double byte channel.
PERIOD = 800ns
E=100ns
DUTY CYCLE = 75%
E=100ns
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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