Datasheet

Pulse Width Modulator (PWM)
MC9S12DP256 — Revision 1.1
Pulse Width Modulator (PWM)
Figure 47 PWM Timer Channel Block Diagram
PWM Enable Each PWM channel has an enable bit (PWMEx) to start its waveform
output. When any of the PWMEx bits are set (PWMEx=1), the
associated PWM output signal is enabled immediately. However, the
actual PWM waveform is not available on the associated PWM output
until its clock source begins its next cycle due to the synchronization of
PWMEx and the clock source. An exception to this is when channels are
concatenated. Refer to PWM 16-Bit Functions for more detail.
CAUTION: The first PWM cycle after enabling the channel can be irregular.
On the front end of the PWM timer, the clock is enabled to the PWM
circuit by the PWMEx bit being high. There is an edge-synchronizing
circuit to guarantee that the clock will only be enabled or disabled at an
Clock Source
T
R
Q
Q
M
U
PPOLx
From Port PWMP
Data Register
PWMEx
(clock edge sync)
To Pin
Driver
GATE
8-bit Compare =
PWMDTYx
8-bit Compare =
PWMPERx
M
U
CAEx
up/down
T
R
Q
Q
reset
8-bit Counter
PWMCNTx
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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