Datasheet

Clocks and Reset Generator (CRG)
MC9S12DP256 — Revision 1.1
Clocks and Reset Generator (CRG)
The VCO has a minimum operating frequency, which corresponds to the
self clock mode frequency.
NOTE: Although it is possible to synthesize a PLLCLK frequency less than
OSCCLK, some systems using a constant OSCCLK frequency base
may not be able to operate.
PLL operation The OSCCLK input is fed through the reference programmable divider
and is divided in a range of 1 to 16, [REFDV +1], to output the
REFERENCE clock. The VCO output clock, PLLCLK, is fed back
through the programmable loop divider and is divided in a range of 2 to
128 in increments of two, 2 x [SYNR +1], to output the FEEDBACK
clock.See Figure 30.
The phase detector then compares the FEEDBACK clock, with the
REFERENCE clock. Correction pulses are generated based on the
phase difference between the two signals. The loop filter then slightly
alters the D.C. voltage on the external filter connected to XFC pad,
based on the width and direction of the correction pulse. The filter can
make fast or slow corrections depending on its mode, described in
Acquisition and tracking Modes below. The values of the external filter
network and the reference frequency determines the speed of the
corrections and the stability of the PLL.
Acquisition and
tracking Modes
The lock detector compares the frequencies of the FEEDBACK clock,
and the REFERENCE clock. Therefore, the speed of the lock detector is
directly proportional to the final reference frequency. The circuit
determines the mode of the PLL and the lock condition based on this
comparison.
The PLL filter is manually or automatically configured into one of two
operating modes:
Acquisition mode
— In acquisition mode, the filter can make large
frequency corrections to the VCO. This mode is used at PLL start-up or
when the PLL has suffered a severe noise hit and the VCO frequency is
far off the desired frequency. When in acquisition mode, the TRACK
status bit is cleared in the CRGFLG register.
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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