Datasheet

Port Integration Module
Register Descriptions
MC9S12DP256 — Revision 1.1
Port Integration Module
PIFP[7:0] — Interrupt Flags Port P
1 = Active edge on the associated bit has occurred (an interrupt will
occur if the associated enable bit is set).
Writing a ‘1’ clears the associated flag.
0 = No active edge pending.
Writing a ‘0’ has no effect.
Port H I/O Register
(PTH)
Read: Anytime.
Write: Anytime.
If the data direction bits of the associated I/O pins are set to 1, a read
returns the value of the port register, otherwise the value at the pins is
read.
Port H Input
Register (PTIH)
Read: Anytime.
Write: Never; writes to this register have no effect.
This register always reads back the status of the associated pins. This
can also be used to detect overload or short circuit conditions on output
pins.
Address Offset: $0020
Bit 7 654321Bit 0
Read:
PTH7 PTH6 PTH5 PTH4 PTH3 PTH2 PTH1 PTH0
Write:
Reset: 00000000
= Reserved or unimplemented
Address Offset: $0021
Bit 7 654321Bit 0
Read: PTIH7 PTIH6 PTIH5 PTIH4 PTIH3 PTIH2 PTIH1 PTIH0
Write:
Reset: --------
= Reserved or unimplemented
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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