Datasheet
Table Of Contents
- List of Sections
- Table of Contents
- General Description
- Central Processing Unit (CPU)
- Pinout and Signal Description
- System Configuration
- Registers
- Operating Modes
- Resource Mapping
- Bus Control and Input/Output
- Resets and Interrupts
- Voltage Regulator (VREG)
- Flash EEPROM 256K
- EEPROM 4K
- Port Integration Module
- Clocks and Reset Generator (CRG)
- Pulse Width Modulator (PWM)
- Enhanced Capture Timer (ECT)
- Serial Communications Interface (SCI)
- Serial Peripheral Interface (SPI)
- Inter-IC Bus (IIC)
- MSCAN
- Analog to Digital Converter
- Byte Data Link Controller Module
- Contents
- Overview
- Features
- Block Diagram
- Register Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization/Basic Operation
- Transmitting A Message
- Receiving A Message
- Transmitting An In-Frame Response (IFR)
- Receiving An In-Frame Response (IFR)
- Special BDLC Operations
- Modes of Operation
- Interrupt Operation
- Low Power Options
- Background Debug Module (BDM)
- Breakpoint (BKP) Module
- Revision History
- Glossary
- Literature Updates
EEPROM 4K
Register Descriptions
MC9S12DP256 — Revision 1.1
EEPROM 4K
MASS — Enables Mass Erase
Perform a mass erase of the selected 4k byte block. This bit works in
conjunction with the ERASE bit. If any protection is active on the
selected block, mass erase has no effect and PVIOL is set.
1 = Perform a mass erase of the whole block
0 = Perform sector erase
The registers $0007 to $000B are reserved for factory testing and are
not available to the user.
Table 39 Valid Commands
Command Meaning Remarks
$20 Memory Program Program 1 word (2 bytes)
$40 Sector Erase Erase 4 bytes
$41 Mass Erase Erase all 4k bytes
$05 Erase Verify
Verify all 4k bytes are
erased
other Illegal Generate an access error
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...