Datasheet
Table Of Contents
- List of Sections
- Table of Contents
- General Description
- Central Processing Unit (CPU)
- Pinout and Signal Description
- System Configuration
- Registers
- Operating Modes
- Resource Mapping
- Bus Control and Input/Output
- Resets and Interrupts
- Voltage Regulator (VREG)
- Flash EEPROM 256K
- EEPROM 4K
- Port Integration Module
- Clocks and Reset Generator (CRG)
- Pulse Width Modulator (PWM)
- Enhanced Capture Timer (ECT)
- Serial Communications Interface (SCI)
- Serial Peripheral Interface (SPI)
- Inter-IC Bus (IIC)
- MSCAN
- Analog to Digital Converter
- Byte Data Link Controller Module
- Contents
- Overview
- Features
- Block Diagram
- Register Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization/Basic Operation
- Transmitting A Message
- Receiving A Message
- Transmitting An In-Frame Response (IFR)
- Receiving An In-Frame Response (IFR)
- Special BDLC Operations
- Modes of Operation
- Interrupt Operation
- Low Power Options
- Background Debug Module (BDM)
- Breakpoint (BKP) Module
- Revision History
- Glossary
- Literature Updates

EEPROM 4K
MC9S12DP256 — Revision 1.1
EEPROM 4K
6. Writing a second command to the ECMD register before executing
the previously written command.
7. Writing a MASS erase command to ECMD while any protection is
enabled. See EPROT register description.
8. Writing a SECTOR erase command to ECMD while protection is
enabled for that sector. See EPROT register description.
9. Writing to any EEPROM register other than ESTAT (to clear
CBEIF) after writing to the command register.
10. Reading from the EEPROM array while a command sequence is
being entered or a program or erase command is being executed
(i.e. CCIF not set). Such a read access returns non valid data.
NOTE:
By writing a 0 to the CBEIF flag the command sequence can be aborted
after the aligned word write to the flash address space or after writing a
command to the ECMD register and before the command is launched.
The PVIOL flag will be set after the aligned write to the EEPROM
address space if an attempt to program or erase a protected area of the
EEPROM array is made. Such an operation will cause the command
sequence to immediately abort. The user must clear the PVIOL flag
before being able to commence another command sequence.
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
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