Datasheet

Flash EEPROM 256K
Register Descriptions
MC9S12DP256 — Revision 1.1
Flash EEPROM 256K
possible when protection is fully disabled by setting the FPLDIS and
FPHDIS bits.
In order to change the flash protection in special modes, the protection
register can be written directly.
In order to change the protection in user mode the flash locations
$FF0A, $FF0B, $FF0C and $FF0D have to be re-programmed and the
MCU reset to reload the FPROT registers from those flash locations.
The size of the protected ranges for the lower and higher subsections
are determined by FPHS1, FPHS0 and FPLS1, FPLS0 respectively. The
protections are disabled by the bits FPHDIS and FPLDIS respectively.
FPOPEN — Opens the flash block or subsections of it for program or
erase.
1 = The flash block or subsections are enabled to program or
erase.
0 = The whole flash block is protected. In this case the other bits
within the protect register are don’t care.
FPHDIS — Flash Protection Higher address range disable
This bit determines whether there is a protected area at the higher end
of the flash block address map.
1 = Protection disabled
0 = Protection enabled
FPHS[1:0] — Flash Protection Higher address size
These 2 bits determine the size of the protected area.
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...