Datasheet

Flash EEPROM 256K
Register Descriptions
MC9S12DP256 — Revision 1.1
Flash EEPROM 256K
FCNFG Ñ Flash
Configuration
Register
Read: Anytime
Write: Anytime
This register is unbanked. It enables the interrupts, gates the security
backdoor writes and selects the register bank to be operated on.
CBEIE — Command Buffers Empty Interrupt Enable
This bit enables the interrupts in case of empty address, data and
command buffers.
1 = An interrupt will be requested whenever the CBEIF flag is set
0 = Command Buffers Empty Interrupts disabled
CCIE — Command Complete Interrupt Enable
This bit enables the interrupts in case of all commands being
completed.
1 = An interrupt will be requested whenever the CCIF flag is set
0 = Command Complete Interrupts disabled
KEYACC — Enable Security Key Writing
1 = Writes to flash module are interpreted as keys to open the
backdoor.
0 = Flash writes are interpreted as the start of a program or erase
sequence.
BKSEL[1:0]— Register bank select
These two bits are used to select which of the four register banks are
addressed. The register bank associated with Flash 0 is the default
out of reset. The bank selection is according to the following table:
Address Offset: $0003
Bit 7 654321Bit 0
Read:
CBEIE CCIE KEYACC
000
BKSEL1 BKSEL0
Write:
Reset: 00000000
= Reserved or unimplemented
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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