Datasheet

Table Of Contents
Resets and Interrupts
MC9S12DP256 — Revision 1.1
Resets and Interrupts
Read: When ADR3–ADR0 have the value of $F, only bits 2–0 in the
ITEST register will be accessible. That is, vectors higher than $FFF4
cannot be tested using the test registers and bits 7–3 will always read
0. If ADR3–ADR0 point to an unimplemented test register, writes will
have no effect and reads will always return 0.
Write: Only in special modes and with WRTINT = 1 and CCR I mask
= 1.
ITEST — Interrupt Test Register
Address Offset: $0016
Bit 7 654321Bit 0
INTE INTC INTA INT8 INT6 INT4 INT2 INT0
Reset:
00000000
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