Datasheet

Table Of Contents
Resets and Interrupts
Register Descriptions
MC9S12DP256 — Revision 1.1
Resets and Interrupts
Register Descriptions
Interrupt Control
and Priority
Register
IRQE — IRQ Select Edge Sensitive Only
1 = IRQ configured to respond only to falling edges. Falling edges
on the IRQ pin will be detected anytime IRQE = 1 and will be
cleared only upon a reset or the servicing of the IRQ interrupt.
0 = IRQ configured for low-level recognition.
Special: read or write anytime
Normal: read anytime, write once
Emulation: read anytime, write never
IRQEN — External IRQ Enable
1 = External IRQ
pin is connected to interrupt logic.
0 = External IRQ
pin is disconnected from interrupt logic.
Normal, emulation, and special modes: read or write anytime
INTCR — Interrupt Control Register
Address Offset: $001E
Bit 7 654321Bit 0
IRQE IRQEN 000000
Reset:
01000000
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