Datasheet

Bus Control and Input/Output
Registers
MC9S12DP256 — Revision 1.1
Bus Control and Input/Output
The EBICTL register is used to control miscellaneous functions (i.e.
stretching of external E clock).
This register is not in the on-chip map in peripheral mode.
Read: anytime (provided this register is in the map).
ESTR — E Stretches
This control bit determines whether the E clock behaves as a simple
free-running clock or as a bus control signal that is active only for
external bus cycles.
Normal and Emulation: write once
Special: write anytime
1 = E stretches high during stretch cycles and low during
non-visible internal accesses.
0 = E never stretches (always free running).
This bit has no effect in single chip modes.
EBICTL — External Bus Interface Control
Address Offset: $000E
Bit 7 654321Bit 0
0000000ESTR
Reset: 00000000Peripheral
Reset:
00000001
All other
modes
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