Datasheet
Table Of Contents
- List of Sections
- Table of Contents
- General Description
- Central Processing Unit (CPU)
- Pinout and Signal Description
- System Configuration
- Registers
- Operating Modes
- Resource Mapping
- Bus Control and Input/Output
- Resets and Interrupts
- Voltage Regulator (VREG)
- Flash EEPROM 256K
- EEPROM 4K
- Port Integration Module
- Clocks and Reset Generator (CRG)
- Pulse Width Modulator (PWM)
- Enhanced Capture Timer (ECT)
- Serial Communications Interface (SCI)
- Serial Peripheral Interface (SPI)
- Inter-IC Bus (IIC)
- MSCAN
- Analog to Digital Converter
- Byte Data Link Controller Module
- Contents
- Overview
- Features
- Block Diagram
- Register Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization/Basic Operation
- Transmitting A Message
- Receiving A Message
- Transmitting An In-Frame Response (IFR)
- Receiving An In-Frame Response (IFR)
- Special BDLC Operations
- Modes of Operation
- Interrupt Operation
- Low Power Options
- Background Debug Module (BDM)
- Breakpoint (BKP) Module
- Revision History
- Glossary
- Literature Updates

Resource Mapping
MC9S12DP256 — Revision 1.1
Resource Mapping
Write never.
Miscellaneous System Control Register
Additional mapping and external resource controls are available. To use
external resources the part must be operated in one of the expanded
modes.
EXSTR1, EXSTR0 — External Access Stretch
This two bit field determines the amount of clock stretch on accesses
to the external address space. In single chip and peripheral modes
these bits have no meaning or effect.
In emulation modes (wide or narrow), accesses to addresses that are
normally internal but are removed from the memory map will take
place in one cycle, regardless of the state of the EXSTR[1:0] bits.
These addresses include the following register locations: PORTA,
PORTB, DDRA, DDRB, PORTE, DDRE, PEAR, MODE, PUCR,
RDRIV, PORTK and DDRK. They also include the following Flash
space addresses: $4000–$7FFF (but only if ROMHM = 0) and $8000
– $FFFF.
Normal and Emulation: Write once.
Special: Write anytime.
MISC — Miscellaneous Mapping Control Register
Address Offset: $0013
Bit 7 654321Bit 0 Mode
0000EXSTR1 EXSTR0 ROMHM ROMON
Reset:
0000110
(1)
Exp mode
Reset:
00001101
peripheral or
SC mode
1. in expanded modes the reset value of ROMON is determined by the value present on the PK7 pin during reset.
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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