Datasheet

Resource Mapping
Flash EEPROM mapping through internal Memory Expansion
MC9S12DP256 — Revision 1.1
Resource Mapping
Read and write: anytime.
This register determines the primary direction for each port K pin
configured as general-purpose I/O. The value in a DDR bit also
affects the source of data for reads of the corresponding PORTK
register. If the DDR bit is zero (input) the buffered pin input is read. If
the DDR bit is one (output) the output of the port data latch is read.
This register is not in the map in peripheral mode or in expanded
modes while the EMK bit in the MODE register is set
Bit 7, Bit 5 – Bit 0 — The data direction select for Port K
1 = Associated pin is an output.
0 = Associated pin is a high-impedance input.
CAUTION: It is unwise to write PORTK and DDRK as a word access . If you are
changing Port K pins from inputs to outputs, the data may have extra
transitions during the write
. It is best to initialize PORTK before enabling
as outputs
.
CAUTION: To ensure that you read the correct value from the PORTK pins, always
wait at least two cycles after writing to the DDRK register before reading
from the PORTK register.
DDRK — Port K Data Direction Register
Address Offset: $0033
Bit 7 6 5 4 3 2 1 Bit 0
DDK7 0 DDK5 DDK4 DDK3 DDK2 DDK1 DDK0
Reset:
0 0 0 0 0 0 0 0
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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