Datasheet

Resource Mapping
Internal Resource Mapping
MC9S12DP256 — Revision 1.1
Resource Mapping
Register Block
Mapping
After reset the 1K byte register block resides at location $0000 but can
be reassigned to any 2K byte boundary within the first 32K byte of the
64K byte address space. Mapping of internal registers is controlled by
five bits in the INITRG register. This register initializes the internal
Registers position.
Normal and Emulation: Write once.
Special: Write anytime
Writes to this register take one cycle to go into effect.
Read: Anytime.
Reset to $00 (Registers located from $0000 to $03FF).
REG[15:11] — Internal register map position
These five bits specify the upper five bits of the register block’s
address. INITRG Bit 7 is always set to “0”.
RAM Mapping The MC9S12DP256 has 12K bytes of fully static RAM that is used for
storing instructions, variables, and temporary data during program
execution. After reset, RAM addressing begins at location $1000 but can
be assigned to any 16K byte boundary within the standard 64K byte
address space. It occupies either the first 12K of the 16K space (i.e.
$0000 – $2FFF, $4000 – $6FFF, etc.) or the last 12K of the 16K space
(i.e. $1000 – $3FFF, $5000 – $7FFF, etc.). Mapping of internal RAM is
controlled by three bits in the INITRM register.
Normal and Emulation: Write once.
Special: Write anytime.
NOTE: Writes to this register take one cycle to go into effect .
INITRG — Initialization of Internal Register Position Register
Address Offset: $0011
Bit 7 654321Bit 0
0 REG14 REG13 REG12 REG11 0 0 0
Reset:
00000000
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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