Datasheet

Operating Modes
MC9S12DP256 — Revision 1.1
Operating Modes
EME — Emulate Port E
Normal and Emulation: write never
Special: write anytime
1 = If in any expanded mode or special peripheral mode, PORTE
and DDRE are removed from the memory map. Removing the
registers from the map allows the user to emulate the function
of these registers externally.
0 = PORTE and DDRE are in the memory map so Port E can be
used for general purpose I/O.
In single-chip modes, PORTE and DDRE are always in the map
regardless of the state of this bit.
Background Debug Mode
Background debug mode (BDM) is an auxiliary operating mode that is
used for system development. BDM is implemented in on-chip hardware
and provides a full set of debug operations. Some BDM commands can
be executed while the CPU is operating normally. Other BDM
commands are firmware based, and require the BDM firmware to be
enabled and active for execution.
In special single-chip mode, BDM is enabled and active immediately out
of reset. BDM is available in all other operating modes, but must be
enabled before it can be activated. BDM should not be used in special
peripheral mode because of potential bus conflicts.
Once enabled, background mode can be made active by a serial
command sent via the BKGD pin or execution of a CPU12 BGND
instruction. While background mode is active, the CPU can interpret
special debugging commands, and read and write CPU registers,
peripheral registers, and locations in memory.
While BDM is active, the CPU executes code located in a small on-chip
ROM mapped to addresses $FF20 to $FFFF, and BDM control registers
are accessible at addresses $FF00 to $FF06. The BDM ROM replaces
the regular system vectors while BDM is active. While BDM is active, the
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...