Datasheet

Chapter 6 Parallel Input/Output Control
MC9S08SH32 Series Data Sheet, Rev. 2
82 Freescale Semiconductor
6.6.1.2 Port A Data Direction Register (PTADD)
6.6.1.3 Port A Pull Enable Register (PTAPE)
NOTE
Pull-down devices only apply when using pin interrupt functions, when
corresponding edge select and pin select functions are configured to detect
rising edges.
76543210
R
PTADD7 PTADD6 PTADD5 PTADD4
1
1
PTADD4 has no effect on the output-only PTA4 pin.
PTADD3 PTADD2 PTADD1 PTADD0
W
Reset: 00000000
Figure 6-4. Port A Data Direction Register (PTADD)
Table 6-3. PTADD Register Field Descriptions
Field Description
7:0
PTADD[7:0]
Data Direction for Port A Bits — These read/write bits control the direction of port A pins and what is read for
PTAD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port A bit n and PTAD reads return the contents of PTADn.
76543210
R
PTAPE7 PTAPE6 PTAPE5
1
1
PTAPE5 can be used to pullup PTA5 when configured as open drain output pin, however pullup will not pull pin all the way to
V
DD
. An external pullup should be used if applications requires PTA5 to be driven to V
DD
.
PTAPE4
2
2
PTAPE4 has no effect on the output-only PTA4 pin.
PTAPE3 PTAPE2 PTAPE1 PTAPE0
W
Reset: 00000000
Figure 6-5. Internal Pull Enable for Port A Register (PTAPE)
Table 6-4. PTAPE Register Field Descriptions
Field Description
7:0
PTAPE[7:0]
Internal Pull Enable for Port A Bits — Each of these control bits determines if the internal pull-up or pull-down
device is enabled for the associated PTA pin. For port A pins (except for PTA5) that are configured as outputs,
these bits have no effect and the internal pull devices are disabled.
0 Internal pull-up/pull-down device disabled for port A bit n.
1 Internal pull-up/pull-down device enabled for port A bit n.
PRELIMINARY