Datasheet

Chapter 2 Pins and Connections
MC9S08SH32 Series Data Sheet, Rev. 2
Freescale Semiconductor 25
2.2 Recommended System Connections
Figure 2-4 shows pin connections that are common to MC9S08SH32 Series application systems.
Figure 2-4. Basic System Connections
BKGD/MS
RESET
V
DD
BACKGROUND HEADER
PORT
B
PTB0/PIB0/RxD/ADP4
PTB1/PIB1/TxD/ADP5
PTB2/PIB2/SPSCK/ADP6
PTB3/PIB3/MOSI/ADP7
PTB4/TPM2CH1/MISO
PTB5/TPM1CH1/
SS
PTB6/SDA/XTAL
PTB7/SCL/EXTAL
PORT
C
PTC0/TPM1CH0/ADP8
PTC1/TPM1CH1/ADP9
PTC2/ADP10
PTC3/ADP11
MC9S08SH32
C2
C1
X1
R
F
R
S
PORT
A
PTA0/PIA0/TPM1CH0/ADP0/ACMP+
PTA1/PIA1/TPM2CH0/ADP1/ACMP–
PTA2/PIA2/SDA/ADP2
PTA3/PIA3/SCL/ADP3
0.1 μF
V
DD
4.7 kΩ–10 kΩ
NOTE 1
NOTES:
1. External crystal circuit not required if using the internal clock option.
2.
RESET pin can only be used to reset into user mode, you can not enter BDM using RESET pin. BDM can be entered
by holding MS low during POR or writing a 1 to BDFR in SBDFR with MS low after issuing BDM command.
3. RC filter on
RESET pin recommended for noisy environments.
4. For the 16-pin and 20-pin packages: V
DDA
/V
REFH
and V
SSA
/V
REFL
are double bonded to V
DD
and V
SS
respectively.
5. When PTA4 is configured as BKGD, pin becomes bi-directional.
PTA4/ACMPO/BKGD/MS
PTA5/IRQ/TCLK/
RESET
PTA6/TPM2CH0
PTA7/TPM2CH1
PTC4/ADP12
PTC5/ADP13
PTC6/ADP14
PTC7/ADP15
OPTIONAL
MANUAL
RESET
C
BY
0.1 μF
\V
REFH
\V
REFL
V
SSA
V
DDA
V
DD
V
SS
C
BY
0.1 μF
C
BLK
10 μF
+
5 V
+
SYSTEM
POWER
PRELIMINARY