Datasheet

MCU Block Diagram
MC9S08QE8 Series Data Sheet, Rev. 8
Freescale Semiconductor 3
1 MCU Block Diagram
The block diagram, Figure 1, shows the structure of MC9S08QE8 series MCU.
Figure 1. MC9S08QE8 Series Block Diagram
IIC MODULE (IIC)
USER FLASH
USER RAM
HCS08 CORE
CPU
BDC
PTB7/SCL/EXTAL
PORT B
HCS08 SYSTEM CONTROL
RESETS AND INTERRUPTS
MODES OF OPERATION
POWER MANAGEMENT
COP
LVD
PTB6/SDA/XTAL
PTB5/TPM1CH1/SS
PTB4/TPM2CH1/MISO
PTB3/KBIP7/MOSI/ADP7
PTB2/KBIP6/SPSCK/ADP6
VOLTAGE REGULATOR
PORT A
PTA1/KBIP1/TPM2CH0/ADP1/ACMP1–
ANALOG COMPARATOR
(ACMP1)
LOW-POWER OSCILLATOR
20 MHz INTERNAL CLOCK
SOURCE (ICS)
31.25 kHz to 38.4 kHz
1 MHz to 16 MHz
(XOSCVLP)
V
SS
V
DD
ANALOG-TO-DIGITAL
CONVERTER (ADC12)
12-BIT
PTB1/KBIP5/TxD/ADP5
PTB0/KBIP4/RxD/ADP4
PORT C
PTC7/ACMP2–
PTC6/ACMP2+
PTC5/ACMP2O
PTC4
REAL-TIME COUNTER
(MC9S08QE8 = 8192 BYTES)
(MC9S08QE4 = 4096 BYTES)
(MC9S08QE8 = 512 BYTES)
(MC9S08QE4 = 256 BYTES)
PTA3/KBIP3/SCL/ADP3
PTA2/KBIP2/SDA/ADP2
PTA0/KBIP0/TPM1CH0/ADP0/ACMP1+
PTA4/ACMP1O/BKGD/MS
PTA5/IRQ/TCLK/RESET
IRQ
pins not available on 16-pin packages
pins not available on 16-pin or 20-pin packages
(RTC)
ANALOG COMPARATOR
(ACMP2)
PTA7/TPM2CH2/ADP9
PTA6/TPM1CH2/ADP8
PTC3
PTC2
PTC1/TPM2CH2
PTC0/TPM1CH2
PORT D
PTD3
PTD2
PTD1
PTD0
V
SSA
/V
REFL
V
DDA
/V
REFH
pins not available on 16-pin, 20-pin or 28-pin packages
BKGD/MS
IRQ
EXTAL
XTAL
V
REFL
V
REFH
SCL
SDA
SERIAL PERIPHERAL
INTERFACE MODULE (SPI)
MISO
MOSI
SPSCK
SS
INTERFACE MODULE (SCI)
SERIAL COMMUNICATIONS
RxD
TxD
DEBUG MODULE (DBG)
TCLK
TPM2CH0
TPM2CH1
ACMP1O
ACMP1–
ACMP1+
ACMP2O
ACMP2–
ACMP2+
ADP9–ADP0
TPM2CH2
TCLK
TPM1CH0
TPM1CH1
TPM1CH2
16-BIT TIMER PWM
MODULE (TPM1)
16-BIT TIMER PWM
MODULE (TPM2)
KEYBOARD INTERRUPT
MODULE (KBI)
KBIP7–KBIP0
V
SSA
V
DDA
V
SSA
V
DDA
Notes: When PTA5 is configured as RESET, pin becomes bi-directional with output being open-drain drive containing an internal pullup device.
When PTA4 is configured as BKGD, pin becomes bi-directional.
For the 16-pin and 20-pin packages, V
SSA
/V
REFL
and V
DDA
/V
REFH
are double bonded to V
SS
and V
DD
respectively.