Datasheet

Electrical Characteristics
MC9S08QE32 Series MCU Data Sheet, Rev. 7
Freescale Semiconductor 23
4D
Clock (SPSCK) high or low time
Master
Slave
t
WSPSCK
t
cyc
30
t
cyc
– 30
1024 t
cyc
ns
ns
5D
Data setup time (inputs)
Master
Slave
t
SU
15
15
ns
ns
6D
Data hold time (inputs)
Master
Slave
t
HI
0
25
ns
ns
7 D Slave access time t
a
—1t
cyc
8 D Slave MISO disable time t
dis
—1t
cyc
9D
Data valid (after SPSCK edge)
Master
Slave
t
v
25
25
ns
ns
10 D
Data hold time (outputs)
Master
Slave
t
HO
0
0
ns
ns
11 D
Rise time
Input
Output
t
RI
t
RO
t
cyc
– 25
25
ns
ns
12 D
Fall time
Input
Output
t
FI
t
FO
t
cyc
– 25
25
ns
ns
1
Max operating frequency limited to 8 MHz when input filter disabled and high output drive strength enabled. Max
operating frequency limited to 5 MHz when input filter enabled and high output drive strength disabled.
Table 14. SPI Timing (continued)
No. C Function Symbol Min Max Unit