Datasheet

Appendix A Electrical Characteristics
MC9S08QD4 Series MCU Data Sheet, Rev. 6
184 Freescale Semiconductor
A.7 Internal Clock Source Characteristics
Table A-7. Internal Clock Source Specifications
Characteristic Symbol Min Typ
1
1
Data in Typical column was characterized at 3.0 V and 3.0 V, 25°C or is typical recommended value.
Max Unit
Average internal reference frequency - untrimmed
f
int_ut
25 31.25 41.66 kHz
Average internal reference frequency - trimmed
f
int_t
— 31.25 — kHz
DCO output frequency range - untrimmed
f
dco_ut
12.8 16 21.33 MHz
DCO output frequency range - trimmed
f
dco_t
—16—MHz
Resolution of trimmed DCO output frequency at fixed voltage and
temperature (Consumer and Industrial MC9S08QDx)
2
2
Characterized, but not tested.
Δf
dco_res_t
——± 0.2
%f
dco
Resolution of trimmed DCO output frequency at fixed voltage and
temperature (Automotive S9S08QDx)
2
–40°C to 0°C
0 to 125°C
——
± 0.3
± 0.2
Total deviation of trimmed DCO output frequency over voltage and
temperature
2
Consumer and Industrial MC9S08QDx
Automotive S9S08QDx
Δf
dco_t
——
± 2
± 3
%f
dco
FLL acquisition time
2,3
3
This specification applies to any time the FLL reference source or reference divider is changed, trim value changed or changing
from FLL disabled (FBELP, FBILP) to FLL enabled (FEI, FEE, FBE, FBI). If a crystal/resonator is being used as the reference,
this specification assumes it is already running.
t
acquire
1ms
Long term Jitter of DCO output clock (averaged over 2 ms interval)
4
4
Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum f
BUS
.
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal. Noise
injected into the FLL circuitry via V
DD
and V
SS
and variation in crystal oscillator frequency increase the C
Jitter
percentage for
a given interval.
C
Jitter
——0.6
%f
dco