Datasheet

Internal Clock Source (ICS) Characteristics
MC9S08LL64 Series MCU Data Sheet, Rev. 7
Freescale Semiconductor 27
Figure 16. Deviation of DCO Output from Trimmed Frequency (20 MHz, 3.0 V)
9C
Total deviation of trimmed DCO output frequency over
voltage and temperature
Δf
dco_t
+ 0.5
–1.0
±2%f
dco
10 C
Total deviation of trimmed DCO output frequency over fixed
voltage and temperature range of 0
°
C to 70
°
C
Δf
dco_t
± 0.5 ±1%f
dco
11 C FLL acquisition time
2
t
Acquire
—— 1ms
12 C
Long term jitter of DCO output clock (averaged over 2 ms
interval)
3
C
Jitter
0.02 0.2 %f
dco
1
Data in Typical column was characterized at 3.0 V, 25 °C or is typical recommended value.
2
This specification applies to any time the FLL reference source or reference divider is changed, trim value changed or
changing from FLL disabled (FBELP, FBILP) to FLL enabled (FEI, FEE, FBE, FBI). If a crystal/resonator is being used as
the reference, this specification assumes it is already running.
3
Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum f
Bus
.
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal. Noise
injected into the FLL circuitry via V
DD
and V
SS
and variation in crystal oscillator frequency increase the C
Jitter
percentage
for a given interval.
Table 12. ICS Frequency Specifications (Temperature Range = –40 to 85°C Ambient) (continued)
Num C Characteristic Symbol Min Typ
1
Max Unit