Datasheet

Devices in the MC9S08LL16 Series
MC9S08LL16 Series MCU Data Sheet, Rev. 7
Freescale Semiconductor 5
Figure 1. MC9S08LL16 Series Block Diagram
8-BIT KEYBOARD
INTERRUPT (KBI)
IIC MODULE (IIC)
SERIAL PERIPHERAL
INTERFACE (SPI)
USER FLASH B
USER RAM
ON-CHIP ICE
DEBUG MODULE (DBG)
(LL16 = 8K BYTES)
HCS08 CORE
CPU
BKGD
INT
BKP
2-CHANNEL TIMER/PWM
(TPM1)
HCS08 SYSTEM CONTROL
RESETS AND INTERRUPTS
MODES OF OPERATION
POWER MANAGEMENT
COP
IRQ LVD
LOW-POWER OSCILLATOR
INTERNAL CLOCK
Source (ICS)
SERIAL COMMUNICATIONS
2-CHANNEL TIMER/PWM
(TPM2)
(LL8 = 2K BYTES)
V
LL1
V
LCD
LCD
V
LL2
V
LL3
V
CAP1
V
CAP2
LCD[31:0]
V
SS
V
DD
VOLTAGE
REGULATOR
USER FLASH A
(LL8 = 8K BYTES)
PTC7/IRQ/TCLK
PTC5/TPM2CH1
PTC4/TPM2CH0
PTC3/TPM1CH1
PORT B
PTB5/MOSI/SCL
PTB4/MISO/SDA
PTB3
PTB2/RESET
PTB1/XTAL
PTB0/EXTAL
PTA7/KBIP7/ADP7/ACMP–
PTA6/KBIP6/ADP6/ACMP+
PTA4/KBIP4/ADP4/LCD30
INTERFACE (SCI)
PTB7/SS
PTB6/SPSCK
PTC1/TxD
PTC0/RxD
TxD
RxD
SS
SPSCK
SCL
SDA
MOSI
MISO
V
SSA
/V
REFL
V
DDA
/V
REFH
XTAL
EXTAL
IRQ
KBI[7:0]
PORT A
RESET
TPM2CH0
LIQUID CRYSTAL
DISPLAY DRIVER
ANALOG-TO-DIGITAL
CONVERTER (ADC)
12-BIT
ANALOG COMPARATOR
(ACMP)
ACMP+
ACMP–
AD[7:0]
TIME OF DAY MODULE
(TOD)
TPM2CH1
TCLK
TPM1CH0
TPM1CH1
TCLK
PTA1/KBIP1/SPSCK/ADP1
PORT C
PORT D
PORT E
PTD[7:0]/LCD[7:0]
PTE[7:0]/LCD[15:8]
PTC6/ACMPO//BKGD/MS
PTC2/TPM1CH0
Pins not available on 48-pin packages.
Notes: When PTB2 is configured as RESET, pin becomes bi-directional with
output being open-drain drive containing an internal pull-up device.
(LL16 = 8K BYTES)
(LL8 = 2K BYTES)
(LL16 = 2K BYTES)
PTA5/KBIP5/ADP5/LCD31
LCD[23:16] not available on 48-pin packages.
ACMPO
BKGD/MS
When PTC6 is configured as BKGD, pin becomes bi-directional.
K EY :
PTA0/KBIP0/SS/ADP0
PTA2/KBIP2/SDA/MISO/ADP2
PTA3/KBIP3/SCL/MOSI/ADP3