Datasheet

Timer/PWM Module (S08TPMV3)
MC9S08JM60 Series Data Sheet, Rev. 3
Freescale Semiconductor 283
Reset the TPM counter before writing to the TPM modulo registers to avoid confusion about when the first
counter overflow will occur.
16.3.4 TPM Channel n Status and Control Register (TPMxCnSC)
TPMxCnSC contains the channel-interrupt-status flag and control bits used to configure the interrupt
enable, channel configuration, and pin function.
76543210
R
Bit 15 14 13 12 11 10 9 Bit 8
W
Reset00000000
Figure 16-10. TPM Counter Modulo Register High (TPMxMODH)
76543210
R
Bit 7654321Bit 0
W
Reset00000000
Figure 16-11. TPM Counter Modulo Register Low (TPMxMODL)
76543210
RCHnF
CHnIE MSnB MSnA ELSnB ELSnA
00
W0
Reset00000000
= Unimplemented or Reserved
Figure 16-12. TPM Channel n Status and Control Register (TPMxCnSC)