Datasheet

Chapter 4 Memory
MC9S08DV60 Series Data Sheet, Rev 3
54 Freescale Semiconductor
3. Write a 1 to the FCBEF bit in FSTAT to clear FCBEF and launch the command (including its
address and data information).
A partial command sequence can be aborted manually by writing a 0 to FCBEF any time after the
write to the memory array and before writing the 1 that clears FCBEF and launches the complete
command. Aborting a command in this way sets the FACCERR access error flag which must be
cleared before starting a new command.
A strictly monitored procedure must be obeyed or the command will not be accepted. This
minimizes the possibility of any unintended changes to the memory contents. The command
complete flag (FCCF) indicates when a command is complete. The command sequence must be
completed by clearing FCBEF to launch the command. Figure 4-2 is a flowchart for executing all
of the commands except for burst programming and sector erase abort.
4. Wait until the FCCF bit in FSTAT is set. As soon as FCCF= 1, the operation has completed
successfully.
Figure 4-2. Program and Erase Flowchart
START
WRITE COMMAND TO FCMD
NO
YES
FPVIOL OR
WRITE 1 TO FCBEF
TO LAUNCH COMMAND
AND CLEAR FCBEF
(2)
1
0
FCCF?
ERROR EXIT
DONE
(2)
Wait at least four bus cycles
before checking FCBEF or FCCF.
0
FACCERR?
CLEAR ERROR
FACCERR?
WRITE TO FCDIV
(1)
(1)
Required only once
after reset.
PROGRAM AND
ERASE FLOW
WRITE TO FLASH TO BUFFER
ADDRESS AND DATA