Datasheet

Chapter 8 Central Processor Unit (RS08CPUV1)
MC9RS08KA2 Series Data Sheet, Rev. 4
72 Freescale Semiconductor
SUB #opr8i
SUB opr8a
SUB opr4a
SUB ,X
(1)
SUB X
Subtract
A ← (A) – (M)
A ← (A) – (X)
¦¦
IMM
DIR
TNY
IX
DIR
A0
B0
7x
7E
7F
ii
dd
2
3
3
3
3
TAX
(1)
Transfer A to X X ← (A)
¦ —INH EF 2
TST opr8a
(1)
TSTA
(1)
TST ,X
(1)
TSTX
(1)
Test for Zero
(M) – $00
(A) – $00
(X) – $00
¦ —
DD
INH
IX
INH
4E
AA
4E
4E
dd dd
00
0E 0E
0F 0F
5
2
5
5
TXA
(1)
Transfer X to A A ← (X)
¦ — INH CF 3
WAIT
Put MCU into WAIT
mode
——INH AF 2+
Table 8-1. Instruction Set Summary (Sheet 6 of 6)
Source
Form
Description Operation
Effect
on
CCR
Address
Mode
Opcode
Operand
Cycles
ZC
1. This is a pseudo instruction supported by the normal RS08 instruction set.
2. This instruction is different from that of the HC08 and HCS08 in that the RS08 does not auto-increment the index register.