Datasheet
Chapter 5 Resets, Interrupts, and General System Control
MC9RS08KA2 Series Data Sheet, Rev. 4
44 Freescale Semiconductor
5.8.6 System Interrupt Pending Register (SIP1)
This high page register contains status of the pending interrupt from the modules.
Figure 5-7. System Interrupt Pending Register (SIP1)
76543210
R 0 0 0 KBI ACMP MTIM RTI LVD
W
Reset:00000000
= Unimplemented or Reserved
Table 5-9. SIP1 Register Field Descriptions
Field Description
4
KBI
Keyboard Interrupt Pending — This read-only bit indicates there is a pending interrupt from the KBI module.
Clearing the KBF flag of the KBISC register clears this bit. Reset also clears this bit.
0 There is no pending KBI interrupt; i.e., KBF flag and/or KBIE bit is cleared.
1 There is a pending KBI interrupt; i.e., KBF flag and KBIE bit are set.
3
ACMP
Analog Comparator Interrupt Pending — This read-only bit indicates there is a pending interrupt from the
ACMP module. Clearing the ACF flag of the ACMPSC register clears this bit. Reset also clears this bit.
0 There is no pending ACMP interrupt; i.e., ACF flag and/or ACIE bit is cleared.
1 There is a pending a ACMP interrupt; i.e., ACF flag and ACIE bit are set.
2
MTIM
Modulo Timer Interrupt Pending — This read-only bit indicates there is a pending interrupt from the MTIM
module. Clearing the TOF flag of the MTIMSC register clears this bit. Reset also clears this bit.
0 There is no pending MTIM interrupt; i.e., TOF flag and/or TOIE bit is cleared.
1 There is a pending MTIM interrupt; i.e., TOF flag and TOIE bit are set.
1
RTI
Real-Time Interrupt Pending — This read-only bit indicates there is a pending interrupt from the RTI. Clearing
the RTIF flag of the SRTISC register clears this bit. Reset also clears this bit.
0 There is no pending RTI interrupt; i.e., RTIF flag and/or RTIE bit is cleared.
1 There is a pending RTI interrupt; i.e., RTIF flag and RTIE bit are set.
0
LVD
Low-Voltage Detect Interrupt Pending — This read-only bit indicates there is a pending interrupt from the low
voltage detect module. Clearing the LVDF flag of the SPMSC1 register clears this bit. Reset also clears this bit.
0 There is no pending LVD interrupt; i.e., LVDF flag and/or LVDE bit is cleared.
1 There is a pending LVD interrupt; i.e., LVDF flag, LVDIE, and LVDE bits are set.