Datasheet

Chapter 4 Memory
MC9RS08KA2 Series Data Sheet, Rev. 4
Freescale Semiconductor 29
4.5 RAM
The device includes two sections of static RAM. The locations from $0000 to $000D can be directly
accessed using the more efficient tiny addressing mode instructions and short addressing mode
instructions. Location $000E RAM can either be accessed through D[X] register when register X is $0E
or through the paging window location $00CE when PAGESEL register is $00. The second section of
RAM starts from $0020 to $004F, and it can be accessed using direct addressing mode instructions.
The RAM retains data when the MCU is in low-power wait and stop mode. RAM data is unaffected by
any reset provided that the supply voltage does not drop below the minimum value for RAM retention.
4.6 Flash
The Flash memory is intended primarily for program storage. In-circuit programming allows the operating
program to be loaded into the Flash memory after final assembly of the application product. It is possible
to program the entire array through the single-wire background debug interface. Because the device does
not include on-chip charge pump circuitry, external V
PP
is required for program and erase operations.
4.6.1 Features
Features of the Flash memory include:
$020C–
$020F
Unimplemented
$0210 FOPT
0 0 0 0 0 0 0 SECD
$0211 FLCR 0 0 0 0 HVEN MASS 0PGM
$0212–
$0213
Reserved
$0214–
$021F
Unimplemented
$0220 PTAPE 0 0 PTAPE5 PTAPE4 0 PTAPE2 PTAPE1 PTAPE0
$0221 PTAPUD 0 0 PTAPUD5 PTAPUD4 0 PTAPUD2 PTAPUD1 PTAPUD0
$0222 PTASE 0 0 PTASE5 PTASE4 PTASE3 0 PTASE1 PTASE0
$0223–
$023F
Unimplemented
$3FF8 Reserved
$3FF9 Reserved
$3FFA
2
Reserved Reserved for Room Temperature ICS Trim
$3FFB
2
Reserved Reserved FTRIM
$3FFC NVOPT 0 0 0 0 0 0 0 SECD
1
Physical RAM in $000E can be accessed through D[X] register when the content of the index register X is $0E.
2
If using the MCU untrimmed, $3FFA and $3FFB may be used by applications.
Table 4-1. Register Summary (continued)
Address Register Name Bit 7 6 5 4 3 2 1 Bit 0
= Unimplemented or Reserved