Datasheet
Appendix A Electrical Characteristics
MC9RS08KA2 Series Data Sheet, Rev. 4
Freescale Semiconductor 111
P
D
= K ÷ (T
J
+ 273°C) Eqn. A-2
Solving Equation A-1 and Equation A-2 for K gives:
K = P
D
× (T
A
+ 273°C) + θ
JA
× (P
D
)
2
Eqn. A-3
where K is a constant pertaining to the particular part. K can be determined from Equation A-3 by
measuring P
D
(at equilibrium) for a known T
A
. Using this value of K, the values of P
D
and T
J
can be
obtained by solving equations 1 and 2 iteratively for any value of T
A
.
A.4 Electrostatic Discharge (ESD) Protection Characteristics
Although damage from static discharge is much less common on these devices than on early CMOS
circuits, normal handling precautions should be used to avoid exposure to static discharge. Qualification
tests are performed to ensure that these devices can withstand exposure to reasonable levels of static
without suffering any permanent damage. All ESD testing is in conformity with CDF-AEC-Q00 Stress
Test Qualification for Automotive Grade Integrated Circuits. (http://www.aecouncil.com/) A device is
considered to have failed if, after exposure to ESD pulses, the device no longer meets the device
specification requirements. Complete dc parametric and functional testing is performed per the applicable
device specification at room temperature followed by hot temperature, unless specified otherwise in the
device specification.
A.5 DC Characteristics
This section includes information about power supply requirements, I/O pin characteristics, and power
supply current in various operating modes.
Table A-3. ESD Protection Characteristics
Parameter Symbol Value Unit
ESD Target for Machine Model (MM)
MM circuit description
V
THMM
200 V
ESD Target for Human Body Model (HBM)
HBM circuit description
V
THHBM
2000 V
Table A-4. DC Characteristics
(Temperature Range = –40 to 85°C Ambient)
Parameter Symbol Min Typical Max Unit
Supply voltage (run, wait and stop modes.)
0 < f
Bus
<10MHz
V
DD
1.8
—
5.5
V
Minimum RAM retention supply voltage
applied to V
DD
V
RAM
0.8
1
——V
Low-voltage Detection threshold
(V
DD
falling)
(V
DD
rising)
V
LVD
1.80
1.88
1.86
1.94
1.95
2.03
V
Power on RESET (POR) voltage V
POR
0.9 1.4 1.7 V
Input high voltage (V
DD
> 2.3V) (all digital inputs) V
IH
0.70 × V
DD
——V
Input high voltage (1.8 V ≤ V
DD
≤ 2.3 V) (all digital inputs) V
IH
0.85 × V
DD
——V