Datasheet

Appendix A Electrical Characteristics
MC9RS08KA2 Series Data Sheet, Rev. 4
110 Freescale Semiconductor
A.3 Thermal Characteristics
This section provides information about operating temperature range, power dissipation, and package
thermal resistance. Power dissipation on I/O pins is usually small compared to the power dissipation in
on-chip logic and voltage regulator circuits and it is user-determined rather than being controlled by the
MCU design. In order to take P
I/O
into account in power calculations, determine the difference between
actual pin voltage and V
SS
or V
DD
and multiply by the pin current for each I/O pin. Except in cases of
unusually high pin current (heavy loads), the difference between pin voltage and V
SS
or V
DD
will be very
small.
The average chip-junction temperature (T
J
) in °C can be obtained from:
T
J
= T
A
+ (P
D
× θ
JA
) Eqn. A-1
where:
T
A
= Ambient temperature, °C
θ
JA
= Package thermal resistance, junction-to-ambient, °C/W
P
D
= P
int
+ P
I/O
P
int
= I
DD
× V
DD
, Watts — chip internal power
P
I/O
= Power dissipation on input and output pins — user determined
For most applications, P
I/O
<< P
int
and can be neglected. An approximate relationship between P
D
and T
J
(if P
I/O
is neglected) is:
Table A-2. Thermal Characteristics
Rating Symbol Value Unit
Operating temperature range (packaged) T
A
T
L
to T
H
–40 to 85
°C
Maximum junction temperature T
JMAX
105
°C
Thermal resistance
1,2,3,4
6-pin DFN
1s
2s2p
8-pin PDIP
1s
2s2p
8-pin SOIC
1s
2s2p
1
Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance,
mounting site (board) temperature, ambient temperature, air flow, power dissipation of other
components on the board, and board thermal resistance.
2
Junction to Ambient Natural Convection
3
1s - Single Layer Board, one signal layer
4
2s2p - Four Layer Board, 2 signal and 2 power layers
θ
JA
225
53
115
74
160
98
°C/W