Datasheet

Direct Page Registers
MC68HC908QB8 Data Sheet, Rev. 3
Freescale Semiconductor 27
$0022
TIM Counter Register Low
(TCNTL)
See page 185.
Read: Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Write:
Reset:00000000
$0023
TIM Counter Modulo
Register High (TMODH)
See page 185.
Read:
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
Write:
Reset:11111111
$0024
TIM Counter Modulo
Register Low (TMODL)
See page 185.
Read:
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Write:
Reset:11111111
$0025
TIM Channel 0 Status and
Control Register (TSC0)
See page 186.
Read: CH0F
CH0IE MS0B MS0A ELS0B ELS0A TOV0 CH0MAX
Write: 0
Reset:00000000
$0026
TIM Channel 0
Register High (TCH0H)
See page 189.
Read:
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
Write:
Reset: Indeterminate after reset
$0027
TIM Channel 0
Register Low (TCH0L)
See page 189.
Read:
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Write:
Reset: Indeterminate after reset
$0028
TIM Channel 1 Status and
Control Register (TSC1)
See page 186.
Read: CH1F
CH1IE
0
MS1A ELS1B ELS1A TOV1 CH1MAX
Write: 0
Reset:00000000
$0029
TIM Channel 1
Register High (TCH1H)
See page 189.
Read:
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
Write:
Reset: Indeterminate after reset
$002A
TIM Channel 1
Register Low (TCH1L)
See page 189.
Read:
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Write:
Reset: Indeterminate after reset
$002B
↓
$002F
Reserved
$0030
TIM Channel 2 Status and
Control Register (TSC2)
See page 186.
Read: CH2F
CH2IE
0
MS2A ELS2B ELS2A TOV2 CH2MAX
Write: 0
Reset:00000000
$0031
TIM Channel 2
Register High (TCH2H)
See page 189.
Read:
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
Write:
Reset: Indeterminate after reset
$0032
TIM Channel 2
Register Low (TCH2L)
See page 189.
Read:
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Write:
Reset: Indeterminate after reset
$0033
TIM Channel 3 Status and
Control Register (TSC3)
See page 186.
Read: CH3F
CH3IE
0
MS3A ELS3B ELS3A TOV3 CH3MAX
Write: 0
Reset:00000000
$0034
TIM Channel 3
Register High (TCH3H)
See page 189.
Read:
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
Write:
Reset: Indeterminate after reset
$0035
TIM Channel 3
Register Low (TCH3L)
See page 189.
Read:
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Write:
Reset: Indeterminate after reset
Addr.Register Name Bit 7654321Bit 0
= Unimplemented R = Reserved U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 3 of 5)