Datasheet

System Integration Module (SIM)
MC68HC908GR16 Data Sheet, Rev. 5.0
186 Freescale Semiconductor
Figure 15-11. Interrupt Processing
15.5.1.1 Hardware Interrupts
A hardware interrupt does not stop the current instruction. Processing of a hardware interrupt begins after
completion of the current instruction. When the current instruction is complete, the SIM checks all pending
hardware interrupts. If interrupts are not masked (I bit clear in the condition code register) and if the
corresponding interrupt enable bit is set, the SIM proceeds with interrupt processing; otherwise, the next
instruction is fetched and executed.
NO
NO
YES
NO
NO
YES
NO
YES
AS MANY INTERRUPTS
I BIT SET?
FROM RESET
BREAK
I BIT SET?
IRQ
INTERRUPT?
SWI
INSTRUCTION?
RTI
INSTRUCTION?
FETCH NEXT
INSTRUCTION
UNSTACK CPU REGISTERS
STACK CPU REGISTERS
SET I BIT
LOAD PC WITH INTERRUPT VECTOR
EXECUTE INSTRUCTION
YES
YES
AS EXIST ON CHIP
INTERRUPT?