Datasheet

Monitor ROM
MC68HC908AP Family Data Sheet, Rev. 4
Freescale Semiconductor 39
$FE06
Interrupt Status Register 3
(INT3)
Read: 0 IF21 IF20 IF19 IF18 IF17 IF16 IF15
Write: RRRRRRRR
Reset: 00000000
$FE07 Reserved
Read:
RRRRRRRR
Write:
Reset:
$FE08
FLASH Control Register
(FLCR)
Read:0000
HVEN MASS ERASE PGM
Write:
Reset: 00000000
$FE09
FLASH Block Protect
Register
(FLBPR)
Read:
BPR7 BPR6 BPR5 BPR4 BPR3 BPR2 BPR1 BPR0
Write:
Reset: 00000000
$FE0A Reserved
Read:
RRRRRRRR
Write:
Reset:
$FE0B Reserved
Read:
RRRRRRRR
Write:
Reset:
$FE0C
Break Address
Register High
(BRKH)
Read:
Bit 15 14 13 12 11 10 9 Bit 8
Write:
Reset: 00000000
$FE0D
Break Address
Register Low
(BRKL)
Read:
Bit 7654321Bit 0
Write:
Reset: 00000000
$FE0E
Break Status and Control
Register
(BRKSCR)
Reset:
BRKE BRKA
000000
Read:
Write: 00000000
$FE0F LVI Status Register (LVISR)
Reset: LVIOUT 0 000000
Read:
Write: 00000000
$FFCF
Mask Option Register
(MOR)
#
Read:
OSCSEL1 OSCSEL0 RRRRRR
Write:
Erased:11111111
Reset:UUUUUUUU
$FFFF
COP Control Register
(COPCTL)
Read: Low byte of reset vector
Write: Writing clears COP counter (any value)
Reset: Unaffected by reset
#
MOR is a non-volatile FLASH register; write by programming.
Addr. Register Name Bit 7 654321Bit 0
U = Unaffected X = Indeterminate
= Unimplemented R = Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 9 of 9)