Datasheet

Memory
MC68HC908AP Family Data Sheet, Rev. 4
38 Freescale Semiconductor
$005A
ADC Data Register Low 0
(ADRL0)
Read: ADx ADx ADx ADx ADx ADx ADx ADx
Write: RRRRRRRR
Reset: 00000000
$005B
ADC Data Register Low 1
(ADRL1)
Read: AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2
Write: RRRRRRRR
Reset: 00000000
$005C ADC Data Register Low 2
(ADRL2)
Read: AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2
Write: RRRRRRRR
Reset: 00000000
$005D
ADC Data Register Low 3
(ADRL3)
Read: AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2
Write: RRRRRRRR
Reset: 00000000
$005E
ADC Auto-scan Control
Register
(ADASCR)
Read:
AUTO1 AUTO0 ASCAN
Write:
Reset: 00000000
$005F Unimplemented
Read:
Write:
Reset:
$FE00
SIM Break Status Register
(SBSR)
Read:
RRRRRR
SBSW
R
Write: Note
Reset: 0
Note: Writing a logic 0 clears SBSW.
$FE01
SIM Reset Status Register
(SRSR)
Read: POR PIN COP ILOP ILAD MODRST LVI 0
Write:
Reset: 10000000
$FE02 Reserved
Read:
RRRRRRRR
Write:
Reset:
$FE03
SIM Break Flag Control Reg-
ister
(SBFCR)
Read:
BCFE RRRRRRR
Write:
Reset: 0
$FE04
Interrupt Status Register 1
(INT1)
Read: IF6 IF5 IF4 IF3 IF2 IF1 0 0
Write: RRRRRRRR
Reset: 00000000
$FE05
Interrupt Status Register 2
(INT2)
Read: IF14 IF13 IF12 IF11 IF10 IF9 IF8 IF7
Write: RRRRRRRR
Reset: 00000000
Addr. Register Name Bit 7 654321Bit 0
U = Unaffected X = Indeterminate
= Unimplemented R = Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 8 of 9)