Datasheet

Monitor ROM
MC68HC908AP Family Data Sheet, Rev. 4
Freescale Semiconductor 37
$004D
MMIIC Data Receive
Register
(MMDRR)
Read: MMRD7 MMRD6 MMRD5 MMRD4 MMRD3 MMRD2 MMRD1 MMRD0
Write:
Reset: 00000000
$004E
MMIIC CRC Data Register
(MMCRDR)
Read: MMCRCD7 MMCRCD6 MMCRCD5 MMCRCD4 MMCRCD3 MMCRCD2 MMCRCD1 MMCRCD0
Write:
Reset: 00000000
$004F
MMIIC Frequency Divider
Register
(MMFDR)
Read: 0 0 0 0 0
MMBR2 MMBR1 MMBR0
Write:
Reset: 00000100
$0050 Reserved
Read:
RRRRRRRR
Write:
Reset:
$0051
Timebase Control Register
(TBCR)
Read: TBIF
TBR2 TBR1 TBR0
0
TBIE TBON R
Write:
TACK
Reset: 00000000
$0052 Unimplemented
Read:
Write:
Reset:
$0053 Unimplemented
Read:
Write:
Reset:
$0054 Unimplemented
Read:
Write:
Reset:
$0055 Unimplemented
Read:
Write:
Reset:
$0056 Unimplemented
Read:
Write:
Reset:
$0057
ADC Status and Control
Register
(ADSCR)
Read: COCO
AIEN ADCO ADCH4 ADCH3 ADCH2 ADCH1 ADCH0
Write:
Reset: 00011111
$0058
ADC Clock Control Register
(ADICLK)
Read:
ADIV2 ADIV1 ADIV0 ADICLK MODE1 MODE0
0 0
Write:
R
Reset: 00000000
$0059
ADC Data Register High 0
(ADRH0)
Read: ADx ADx ADx ADx ADx ADx ADx ADx
Write: RRRRRRRR
Reset: 00000000
Addr. Register Name Bit 7 654321Bit 0
U = Unaffected X = Indeterminate
= Unimplemented R = Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 7 of 9)