Datasheet

Port C
MC68HC908AP Family Data Sheet, Rev. 4
Freescale Semiconductor 265
Figure 16-8. Port B I/O Circuit
When DDRBx is a logic 1, reading address $0001 reads the PTBx data latch. When DDRBx is a logic 0,
reading address $0001 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
Table 16-3 summarizes the operation of the port B pins.
16.4 Port C
Port C is an 8-bit special-function port that shares one of its pins with the IRQ2, four of its pins with the
SPI module, and two of its pins with the IRSCI module.
16.4.1 Port C Data Register (PTC)
The port C data register contains a data latch for each of the eight port C pins.
Table 16-3. Port B Pin Functions
DDRB
Bit
PTB Bit I/O Pin Mode
Accesses to DDRB Accesses to PTB
Read/Write Read Write
0
X
(1)
1. X = don’t care.
Input, Hi-Z
(2)
2. Hi-Z = high impedance.
DDRB[7:0] Pin
PTB[7:0]
(3)
3. Writing affects data register, but does not affect input.
1 X Output DDRB[7:0] PTB[7:0] PTB[7:0]
Address: $0002
Bit 7654321Bit 0
Read:
PTC7 PTC6 PTC5 PTC4 PTC3 PTC2 PTC1 PTC0
Write:
Reset: Unaffected by reset
Alternative Function: SCRxD SCTxD SPSCK SS MOSI MISO
IRQ2
Figure 16-9. Port C Data Register (PTC)
READ DDRB ($0005)
WRITE DDRB ($0005)
RESET
WRITE PTB ($0001)
READ PTB ($0001)
PTBx
#
DDRBx
PTBx
INTERNAL DATA BUS
# PTB3–PTB0 are open-drain pins when configured as outputs.
PTB7–PTB4 have schmitt trigger inputs.