Datasheet

General Description
MC68HC908AP Family Data Sheet, Rev. 4
26 Freescale Semiconductor
1.6 Power Supply Bypassing (VDD, VDDA, VSS, VSSA)
V
DD
and V
SS
are the power supply and ground pins, the MCU operates from a single power supply
together with an on chip voltage regulator.
Fast signal transitions on MCU pins place high. short-duration current demands on the power supply. To
prevent noise problems, take special care to provide power supply bypassing at the MCU as Figure 1-5
shows. Place the bypass capacitors as close to the MCU power pins as possible. Use
high-frequency-response ceramic capacitor for C
BYPASS
, C
BULK
are optional bulk current bypass
capacitors for use in applications that require the port pins to source high current level.
PTB0/SDA
PTB1/SCL
PTB2/TxD
PTB3/RxD
PTB4/T1CH0
PTB5/T1CH1
PTB6/T2CH0
PTB7/T2CH1
8-bit general purpose I/O port; PTB0–PTB3 are open drain when
configured as output. PTB4–PTB7 have schmitt trigger inputs.
In/Out
V
DD
PTB0 as SDA of MMIIC. In/Out
V
DD
PTB1 as SCL of MMIIC. In/Out
V
DD
PTB2 as TxD of SCI; open drain output. Out
V
DD
PTB3 as RxD of SCI. In
V
DD
PTB4 as T1CH0 of TIM1. In/Out
V
DD
PTB5 as T1CH1 of TIM1. In/Out
V
DD
PTB6 as T2CH0 of TIM2. In/Out
V
DD
PTB7 as T2CH1 of TIM2. In/Out
V
DD
PTC0/IRQ2
PTC1
PTC2/MISO
PTC3/MOSI
PTC4/
SS
PTC5/SPSCK
PTC6/SCTxD
PTC7/SCRxD
8-bit general purpose I/O port; PTC6 and PTC7 are open drain
when configured as output.
In/Out
V
DD
PTC0 is shared with IRQ2 and has schmitt trigger input. In
V
DD
PTC2 as MISO of SPI. In
V
DD
PTC3 as MOSI of SPI. Out
V
DD
PTC4 as SS of SPI. In
V
DD
PTC5 as SPSCK of SPI. In/Out
V
DD
PTC6 as SCTxD of IRSCI; open drain output. Out
V
DD
PTC7 as SCRxD of IRSCI. In
V
DD
PTD0/KBI0
:
PTD7/KBI7
8-bit general purpose I/O port with schmitt trigger inputs. In/Out
V
DD
Pins as keyboard interrupts (with pullup), KBI0–KBI7. In
V
DD
1. See Chapter 22 Electrical Specifications for V
REG
tolerance.
Table 1-2. Pin Functions
PIN NAME PIN DESCRIPTION IN/OUT
VOLTAGE
LEVEL