Datasheet

Multi-Master IIC Interface (MMIIC)
MC68HC908AP Family Data Sheet, Rev. 4
242 Freescale Semiconductor
14.7.1 Data Sequence
Figure 14-12. Data Transfer Sequences for Master/Slave Transmit/Receive Modes
START
Address ACK
TX Data1
MMTXBE=0
MMRW=0
MMAST=1
MMTXIF=1
MMTXBE=1 MMNAKIF=1
MMAST=0
MMTXBE=1
(a) Master Transmit Mode
(b) Master Receive Mode
(c) Slave Transmit Mode
MMTXIF=1
MMTXBE=0
ACK
TX DataN
ACK
STOP
MMTXIF=1
MMTXBE=1
START
Address ACK
RX Data1
MMRXBF=0
MMAST=1
MMTXBE=0
MMRXBF=1
MMRXIF=1
MMNAKIF=1
MMAST=0
MMRXIF=1
MMRXBF=1
ACK
RX DataN
NAK
STOP
1
START
Address ACK
TX Data1
MMTXBE=1
MMRXBF=0
MMNAKIF=1
MMTXBE=0
MMTXBE=1
(d) Slave Receive Mode
MMTXIF=1
ACK
TX DataN
NAK
STOP
MMRXBF=1
MMRXIF=1
MMATCH=1
MMSRW=1
MMTXIF=1
MMTXBE=1
0
START
Address ACK
RX Data1
MMRXBF=1
MMRXIF=1 MMRXIF=1
MMRXBF=1
ACK
RX DataN
ACK
STOP
MMTXBE=0
MMRXBF=0
MMRXBF=1
MMRXIF=1
MMATCH=1
MMSRW=0
Data1 → MMDRR DataN → MMDRR
Data1 → MMDTR
Data2 → MMDTR
DataN+2 → MMDTR
Data1 → MMDTR
Data2 → MMDTR Data3 → MMDTR
DataN+2 → MMDTR
(dummy data → MMDTR)
MMRW=1
Data1 → MMDRR DataN → MMDRR
0
1
Shaded data packets indicate transmissions by the MCU