Datasheet

I/O Registers
MC68HC908AP Family Data Sheet, Rev. 4
Freescale Semiconductor 209
12.9.8 IRSCI Infrared Control Register
The infrared control register contains the control bits for the infrared sub-module.
• Enables the infrared sub-module
• Selects the infrared transmitter narrow pulse width
TNP1 and TNP0 — Transmitter Narrow Pulse Bits
These read/write bits select the infrared transmitter narrow pulse width as shown in Table 12-10. Reset
clears TNP1 and TNP0.
IREN — Infrared Enable Bit
This read/write bit enables the infrared sub-module for encoding and decoding the SCI data stream.
When this bit is clear, the infrared sub-module is disabled. Reset clears the IREN bit.
1 = infrared sub-module enabled
0 = infrared sub-module disabled
Address: $0047
Bit 7654321Bit 0
Read:
R
000
R TNP1 TNP0 IREN
Write:
Reset:00000000
= Unimplemented R = Reserved
Figure 12-20. IRSCI Infrared Control Register (IRSCIRCR)
Table 12-10. Infrared Narrow Pulse Selection
TNP1 and TNP0 Prescaler Divisor (PD)
00 SCI transmits a 3/16 narrow pulse
01 SCI transmits a 1/16 narrow pulse
10
SCI transmits a 1/32 narrow pulse
11