Datasheet

I/O Registers
MC68HC908AP Family Data Sheet, Rev. 4
Freescale Semiconductor 207
SCR2–SCR0 — SCI Baud Rate Select Bits
These read/write bits select the SCI baud rate divisor as shown in Table 12-8. Reset clears
SCR2–SCR0.
Use this formula to calculate the SCI baud rate:
where:
SCI clock source = f
BUS
or CGMXCLK
(selected by CKS bit)
PD = prescaler divisor
BD = baud rate divisor
Table 12-9 shows the SCI baud rates that can be generated with a 4.9152-MHz bus clock when f
BUS
is
selected as SCI clock source.
Table 12-7. SCI Baud Rate Prescaling
SCP1 and SCP0 Prescaler Divisor (PD)
00 1
01 3
10 4
11 13
Table 12-8. IRSCI Baud Rate Selection
SCR2, SCR1, and SCR0 Baud Rate Divisor (BD)
000 1
001 2
010 4
011 8
100 16
101 32
110 64
111 128
baud rate
SCI clock source
16 PD BD××
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