Datasheet

Table Of Contents
MC68HC908AB32Rev. 1.1 Technical Data
Freescale Semiconductor Configuration Register (CONFIG)
85
Technical Data — MC68HC908AB32
Section 6. Configuration Register (CONFIG)
6.1 Contents
6.2 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .85
6.3 Functional description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .86
6.4 Configuration Register 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .86
6.5 Configuration Register 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .88
6.2 Introduction
This section describes the configuration registers, CONFIG1 and
CONFIG2. The configuration registers enable or disable these options:
Low-voltage inhibit (LVI) in stop mode
LVI reset
LVI module power
Stop mode recovery time (32 CGMXCLK cycles or 4096
CGMXCLK cycles)
COP timeout period (2
18
– 2
4
or 2
13
– 2
4
CGMXCLK cycles)
STOP instruction
Computer operating properly module (COP)
EEPROM reference clock source (CPU bus clock or CGMXCLK)