Datasheet

EEPROM
Technical Data MC68HC908AB32 — Rev. 1.1
82 EEPROM Freescale Semiconductor
These two read/write registers are respectively loaded with the contents
of the EEPROM timebase divider non-volatile registers (EEDIVHNVR
and EEDIVLNVR) after a reset.
EEDIVSECD — EEPROM Divider Security Disable
This bit enables/disables the security feature of the EEDIV registers.
When EEDIV security feature is enabled, the state of the registers
EEDIVH and EEDIVL are locked (including this EEDIVSECD bit). The
EEDIVHNVR and EEDIVLNVR non-volatile memory registers are
also protected from being erased/programmed.
1 = EEDIV security feature disabled
0 = EEDIV security feature enabled
EEDIV[10:0] — EEPROM Timebase Prescaler
These prescaler bits store the value of EEDIV which is used as the
divisor to derive a timebase of 35µs from the selected reference clock
source (CGMXCLK or bus clock, see 6.5 Configuration Register 2)
for the EEPROM related internal timer and circuits. EEDIV[10:0] bits
are readable at any time. They are writable when EELAT=0 and
EEDIVSECD=1.
Address: $FE1A
Bit 7654321Bit 0
Read:
EEDIVSECD
RRRREEDIV10EEDIV9EEDIV8
Write:
Reset: Contents of EEDIVHNVR ($FE10)
Figure 5-5. EEPROM Divider Register High (EEDIVH)
Address: $FE1B
Bit 7654321Bit 0
Read:
EEDIV7 EEDIV6 EEDIV5 EEDIV4 EEDIV3 EEDIV2 EEDIV1 EEDIV0
Write:
Reset: Contents of EEDIVLNVR ($FE11)
Figure 5-6. EEPROM Divider Register Low (EEDIVL)