Datasheet

EEPROM
Technical Data MC68HC908AB32 — Rev. 1.1
76 EEPROM Freescale Semiconductor
D. The delay time for the EEPGM bit to be cleared in AUTO mode is less
than t
EEPGM
. However, on other MCUs, this delay time may be different.
For forward compatibility, software should not make any dependency on
this delay time.
E. Any attempt to clear both EEPGM and EELAT bits with a single
instruction will only clear EEPGM. This is to allow time for removal of
high voltage from the EEPROM array.
5.9.2 EEPROM Erasing
The programmed state of an EEPROM bit is logic 0. Erasing changes
the state to a logic 1. Only EEPROM bytes in the non-protected blocks
and EENVR register can be erased.
Use the following procedure to erase a byte, block, or the entire
EEPROM:
1. Configure EERAS1 and EERAS0 for byte, block, or bulk erase; set
EELAT in EECR.
(A)
2. Byte erase: write any data to the desired address.
(B)
Block erase: write any data to an address within the desired
block.
(B)
Bulk erase: write any data to an address within the array.
(B)
3. Set the EEPGM bit.
(C)
Go to step 7 if AUTO is set.
4. Wait for a time: t
EBYTE
for byte erase; t
EBLOCK
for block erase;
t
EBULK
for bulk erase.
5. Clear EEPGM bit.
6. Wait for a time, t
EEFPV
, for the erasing voltage to fall.
Go to step 8.
7. Poll the EEPGM bit until it is cleared by the internal timer.
(D)
8. Clear EELAT bits.
(E)