Datasheet

Configuration Registers (CONFIG)

Technical Data MC68HC908LJ12 — Rev. 2.1

76 Configuration Registers (CONFIG) Freescale Semiconductor

PCEH — Port C Enable High Nibble

Setting PCEH configures the PTC4/FP23–PTC7/FP26 pins for LCD

frontplane driver use. Reset clears this bit.

1 = PTC4/FP23–PTC7/FP26 pins configured as LCD frontplane

driver pins: FP23–FP26

0 = PTC4/FP23–PTC7/FP26 pins configured as standard I/O pins:

PTC4–PTC7

PCEL — Port C Enable Low Nibble

Setting PCEL configures the PTC0/FP19–PTC3/FP22 pins for LCD

frontplane driver use. Reset clears this bit.

1 = PTC0/FP19–PTC3/FP22 pins configured as LCD frontplane

driver pins: FP19–FP22

0 = PTC0/FP19–PTC3/FP22 pins configured as standard I/O pins:

PTC0–PTC3

LVISEL[1:0] — LVI Operating Mode Selection

LVISEL[1:0] selects the voltage operating mode of the LVI module.

(See Section 21. Low-Voltage Inhibit (LVI).) The voltage mode

selected for the LVI should match the operating V

. See Section 23.

Electrical Specifications for the LVI voltage trip points for each of

the modes.

LVISEL1 LVISEL0 Operating Mode

00 Reserved (2.5V)

01 3V

10 5V

11 Reserved

Table 5-1. LVI Trip Point Selection