Datasheet

FLASH Memory (FLASH)
Technical Data MC68HC908LJ12 — Rev. 2.1
68 FLASH Memory (FLASH) Freescale Semiconductor
4.8 FLASH Protection
Due to the ability of the on-board charge pump to erase and program the
FLASH memory in the target application, provision is made to protect
pages of memory from unintentional erase or program operations due to
system malfunction. This protection is done by use of a FLASH block
protect register (FLBPR). The FLBPR determines the range of the
FLASH memory which is to be protected. The range of the protected
area starts from a location defined by FLBPR and ends to the bottom of
the FLASH memory ($FFFF). When the memory is protected, the HVEN
bit cannot be set in either erase or program operations.
NOTE: When the FLBPR is cleared (all 0’s), the entire FLASH memory is
protected from being programmed and erased. When all the bits are set,
the entire FLASH memory is accessible for program and erase.
4.8.1 FLASH Block Protect Register
The FLASH block protect register is implemented as an 8-bit I/O register.
The content of this register determine the starting location of the
protected range within the FLASH memory.
BPR[7:0] — FLASH Block Protect Register Bit 7 to Bit 0
BPR[7:1] represent bits [13:7] of a 16-bit memory address. Bits
[15:14] are logic 1’s and bits [6:0] are logic 0’s.
Figure 4-5. FLASH Block Protect Start Address
Address: $FE09
Bit 7654321Bit 0
Read:
BPR7 BPR6 BPR5 BPR4 BPR3 BPR2 BPR1 BPR0
Write:
Reset:00000000
Figure 4-4. FLASH Block Protect Register (FLBPR)
16-bit memory address
Start address of FLASH block protect 11 0000000
BPR[7:1]